A Linear Equivalent Circuit Model for Depletion-Type Silicon Microring Modulators

Shin, Myungjin; Ban, Yoojin; Yu, Byung-Min; Kim, Min-Hyeong; Rhim, Jinsoo; Zimmermann, Lars; Choi, Woo-Young

doi:10.1109/ted.2017.2648861

Cited by 23 publications

(16 citation statements)

References 21 publications

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“…However, we find there are still certain problems in practice with Verilog-A modeling, such as the simulation process being prone to non-convergence and the inability to describe complex signals [138]. The SPICE models can also be used to describe the physical properties of photonic devices [139,205,208,209]. It is shown that the description of the physical properties of a specific photonic device can be achieved through a simple RLC network, resulting in high simulation efficiency.…”

Section: Statusmentioning

confidence: 99%

Co-packaged optics (CPO): status, challenges, and solutions

Tan

Liu³

et al. 2023

Front. Optoelectron.

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Due to the rise of 5G, IoT, AI, and high-performance computing applications, datacenter traffic has grown at a compound annual growth rate of nearly 30%. Furthermore, nearly three-fourths of the datacenter traffic resides within datacenters. The conventional pluggable optics increases at a much slower rate than that of datacenter traffic. The gap between application requirements and the capability of conventional pluggable optics keeps increasing, a trend that is unsustainable. Co-packaged optics (CPO) is a disruptive approach to increasing the interconnecting bandwidth density and energy efficiency by dramatically shortening the electrical link length through advanced packaging and co-optimization of electronics and photonics. CPO is widely regarded as a promising solution for future datacenter interconnections, and silicon platform is the most promising platform for large-scale integration. Leading international companies (e.g., Intel, Broadcom and IBM) have heavily investigated in CPO technology, an inter-disciplinary research field that involves photonic devices, integrated circuits design, packaging, photonic device modeling, electronic-photonic co-simulation, applications, and standardization. This review aims to provide the readers a comprehensive overview of the state-of-the-art progress of CPO in silicon platform, identify the key challenges, and point out the potential solutions, hoping to encourage collaboration between different research fields to accelerate the development of CPO technology. Graphical Abstract

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Section: Statusmentioning

confidence: 99%

Co-packaged optics (CPO): status, challenges, and solutions

Tan

Liu³

et al. 2023

Front. Optoelectron.

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“…Having an accurate MRM model is essential for optimizing the design of the driver and the circuitry for wavelength stabilization during operation. There are several MRM models have been established according to coupledmode theory [2][3][4][5][6][7]. However, these models exist shortcomings.…”

Section: Introductionmentioning

confidence: 99%

“…However, these models exist shortcomings. Some have ignored the self-heating effect [2][3][4][5], while others neglect electrical parasitics [6,7]. Due to the inadequate representation of the MRM behavior, the transmitter performance is adversely affected.…”

Section: Introductionmentioning

confidence: 99%

A comprehensive equivalent circuit model of silicon microring modulators for electronic and photonic integrated circuit codesign

Bao,

Xue,

et al. 2023

Fourteenth International Conference on Information Optics and Photonics (CIOP 2023)

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“…Similarly, compact photonic device models are also helpful for large-scale PIC design [54]. Active photonic device models with electrical and optical dynamics can strongly benefit the design of high-speed transceiver circuits [55][56][57][58][59][60][61][62][63][64][65]. Compared to p-i-n photodiode receivers, APD receivers require more complex bias circuits due to the bias-dependent multiplication gain of APDs and the required high bias voltage.…”

Section: Introductionmentioning

confidence: 99%

High-speed Si-Ge avalanche photodiodes

Wang

2022

PhotoniX

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High-speed optical interconnects of data centers and high performance computers (HPC) have become the rapid development direction in the field of optical communication owing to the explosive growth of market demand. Currently, optical interconnect systems are moving towards higher capacity and integration. High-sensitivity receivers with avalanche photodiodes (APDs) are paid more attention due to the capability to enhance gain bandwidth. The impact ionization coefficient ratio is one crucial parameter for avalanche photodiode optimization, which significantly affects the excess noise and the gain bandwidth product (GBP). The development of silicon-germanium (Si-Ge) APDs are promising thanks to the low impact ionization coefficient ratio of silicon, the simple structure, and the CMOS compatible process. Separate absorption charge multiplication (SACM) structures are typically adopted in Si-Ge APDs to achieve high bandwidth and low noise. This paper reviews design and optimization in high-speed Si-Ge APDs, including advanced APD structures, APD modeling and APD receivers.

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A Linear Equivalent Circuit Model for Depletion-Type Silicon Microring Modulators

Cited by 23 publications

References 21 publications

Co-packaged optics (CPO): status, challenges, and solutions

Co-packaged optics (CPO): status, challenges, and solutions

A comprehensive equivalent circuit model of silicon microring modulators for electronic and photonic integrated circuit codesign

High-speed Si-Ge avalanche photodiodes

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