IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281)
DOI: 10.1109/iccad.2001.968647
|View full text |Cite
|
Sign up to set email alerts
|

A layout-aware synthesis methodology for RF circuits

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1

Citation Types

0
33
0

Publication Types

Select...
5
3
2

Relationship

0
10

Authors

Journals

citations
Cited by 63 publications
(33 citation statements)
references
References 13 publications
0
33
0
Order By: Relevance
“…Given the high computational costs of the Spice models, their approximation through cheaper functions is the first step in many numerical procedures on microelectronic circuits. Within the vast set of methods proposed by researchers on the matter (Ampazis & Perantonis, 2002a;Daems et al, 2003;Friedman, 1991;Hatami et al, 2004;Hershenson et al, 2001;McConaghy et al, 2009;Taher et al, 2005;Vancorenland et al, 2001) in Table 3 we report a numerical comparison between two well reputed fitting methods and our proposed Reverse Spice based algorithm (for short RS). The methods are Multivariate Adaptive Regression Splines (MARS) (Friedman, 1991), i.e.…”
Section: Reverting the Spice Model On The Three Benchmarksmentioning
confidence: 99%
“…Given the high computational costs of the Spice models, their approximation through cheaper functions is the first step in many numerical procedures on microelectronic circuits. Within the vast set of methods proposed by researchers on the matter (Ampazis & Perantonis, 2002a;Daems et al, 2003;Friedman, 1991;Hatami et al, 2004;Hershenson et al, 2001;McConaghy et al, 2009;Taher et al, 2005;Vancorenland et al, 2001) in Table 3 we report a numerical comparison between two well reputed fitting methods and our proposed Reverse Spice based algorithm (for short RS). The methods are Multivariate Adaptive Regression Splines (MARS) (Friedman, 1991), i.e.…”
Section: Reverting the Spice Model On The Three Benchmarksmentioning
confidence: 99%
“…Several recent papers explain that layout parasitic needs to be incorporated early into the design flow [3,4,5]. Two alternatives exist to include parasitic effects into the transistor sizing process of analog circuit design.…”
Section: Introductionmentioning
confidence: 99%
“…In [4] a simultaneous floorplanning and routing algorithm is presented with floorplans represented as slicing trees. In [5] simultaneous circuit and layout synthesis is achieved with a template-based layout.…”
Section: Introductionmentioning
confidence: 99%