A hybrid module architecture for a prompt momentum discriminating tracker at HL-LHC

Abbaneo, D.; Marchioro, A.

doi:10.1088/1748-0221/7/09/c09001

“…The pitch of the pixel and of the strips is 100µm. A special ASIC, still under design [8], performs cluster finding and form a pair of clusters (stub) compatible to being produced by tracks exceeding a transverse momentum of 2 GeV/c. The modules between 60 and 100 cm from the beam line are composed of pairs of Silicon strip sensors, and are called 2S modules.…”

Section: Cmsmentioning

confidence: 99%

Tracking trigger CMS

Palla¹

2015

Proceedings of INFN Workshop on Future Detectors for HL-LHC — PoS(IFD2014)

0

View full text Add to dashboard Cite

The planned High Luminosity Phase of the LHC (HL-LHC) will increase the collision rate in the ATLAS and CMS detectors by nearly an order of magnitude beyond the maximum luminosity for which the detectors have been designed. In that scenario, the number of proton-proton interactions per bunch crossing is expected to be about 140, on average. This very high pileup environment represents a major challenge for the L1 trigger of the experiments. The inclusion of the high granularity information coming from the Silicon Tracking detectors increases the performance of traditional triggers, based on Muon and Calorimeter information only. This poses new challenges in the design and integration of the novel inner tracking detectors in both ATLAS and CMS. On one hand, this is accomplished by modules capable of transverse momentum (p T ) discrimination, to only readout hits from relatively high p T particles. A second stage performs pattern recognition and tracking at the first level trigger in a few µs, then combined with the rest of the Muon and Calorimeter information. This presentation will discuss the track trigger strategies, the expected performances of L1 tracking, and use of the L1 tracks in the trigger. INFN Workshop on Future Detectors for HL-LHC,

show abstract

“…There are also six layers of modules in the outer barrel and five pairs of disks in the end-cap regions. The three inner layers of modules are made up of Pixel-Strip sensors while the outer layers are Strip-Strip sensors [1]. These double stack modules form pairs of hits called 'stubs'.…”

Section: Tracklet Algorithmmentioning

confidence: 99%

Implementation of FPGA-based level-1 tracking at CMS for the HL-LHC

Chaves

¹

2014

View full text Add to dashboard Cite

A new approach for track reconstruction is presented to be used in the all-hardware first level of the CMS trigger. The application of the approach is intended for the upgraded all-silicon tracker, which is to be installed for the High Luminosity era of the LHC (HL-LHC). The upgraded LHC machine is expected to deliver a luminosity on the order of 5 × 10 34 cm −2 s −1 . This expected luminosity means there would be about 125 pileup events in each bunch crossing at a frequency of 40 MHz. To keep the CMS trigger rate at a manageable level under these conditions, it is necessary to make quick decisions on the events that will be processed. The timing estimates for the algorithm are expected to be below 5 µs, well within the requirements of the L1 trigger at CMS for track identification. The algorithm is integer-based, allowing it to be implemented on an FPGA. Currently we are working on a demonstrator hardware implementation using a Xilinx Virtex 6 FPGA. Results from simulations in C++ and Verilog are presented to show the algorithm performance in terms of data throughput and parameter resolution. ABSTRACT: A new approach for track reconstruction is presented to be used in the all-hardware first level of the CMS trigger. The application of the approach is intended for the upgraded allsilicon tracker, which is to be installed for the High Luminosity era of the LHC (HL-LHC). The upgraded LHC machine is expected to deliver a luminosity on the order of 5 × 10 34 cm −2 s −1 . This expected luminosity means there would be about 125 pileup events in each bunch crossing at a frequency of 40 MHz. To keep the CMS trigger rate at a manageable level under these conditions, it is necessary to make quick decisions on the events that will be processed. The timing estimates for the algorithm are expected to be below 5 µs, well within the requirements of the L1 trigger at CMS for track identification. The algorithm is integer-based, allowing it to be implemented on an FPGA. Currently we are working on a demonstrator hardware implementation using a Xilinx Virtex 6 FPGA. Results from simulations in C++ and Verilog are presented to show the algorithm performance in terms of data throughput and parameter resolution.

show abstract

“…The pitch of the pixel and of the strips is 100µm. A special ASIC, still under design [9], performs cluster finding and form a pair of clusters (stub) compatible to being produced by tracks exceeding a transverse momentum of 2 GeV/c. The modules between 60 and 100 cm from the beam line are composed of pairs of Silicon strip sensors, and are called 2S modules.…”

Section: Cmsmentioning

confidence: 99%

Development of tracking triggers for future LHC upgrades

Palla¹

2014

Proceedings of 22nd International Workshop on Vertex Detectors — PoS(Vertex2013)

View full text Add to dashboard Cite

The planned High Luminosity Phase of the LHC (HL-LHC) will increase the collision rate in the ATLAS and CMS detectors by nearly an order of magnitude beyond the maximum luminosity for which the detectors have been designed. In that scenario, the number of proton-proton interactions per bunch crossing is expected to be about 140, on average. This very high pileup environment represents a major challenge for the L1 trigger of the experiments. The inclusion of the high granularity information coming from the Silicon Tracking detectors increases the performance of traditional triggers, based on Muon and Calorimeter information only. This poses new challenges in the design and integration of the novel inner tracking detectors in both ATLAS and CMS. On one hand, this is accomplished by modules capable of transverse momentum (p T ) discrimination, to only readout hits from relatively high p T particles. A second stage performs pattern recognition and tracking at the first level trigger in a few µs, then combined with the rest of the Muon and Calorimeter information. This presentation will discuss the track trigger strategies, the expected performances of L1 tracking, and use of the L1 tracks in the trigger.

show abstract

A hybrid module architecture for a prompt momentum discriminating tracker at HL-LHC

Cited by 17 publications

References 5 publications

Tracking trigger CMS

Tracking trigger CMS

Implementation of FPGA-based level-1 tracking at CMS for the HL-LHC

Development of tracking triggers for future LHC upgrades

Contact Info

Product

Resources

About