A highly manufacturable 110 nm EDRAM process with Al/sub 2/O/sub 3/ stack MIM capacitor for cost effective high density, high speed, low voltage ASIC memory applications

Abstract

A highly manufacturable I l0nm Embedded DRAM technology with stack A1,03 MIM capacitor has been demonstrated successfully for the first time. High-density DRAM core with 0.1pm2 cell size and high performance logic circuits have been realized at the same time by separation of the gate pattern at memory cell and peripheral logic region. Low temperature BDL process, highly reliable A124 MIM capacitors have been developed to control process temperature. DRAM cell performance has been improved by introducing tungsten wordline, CoSi, plug and tungsten bitline. 7 levels Cu and CVD-OSG low-k material have been implemented to satisfy the requirement of high performance logic circuits design.

Comparison between Al<inf>2</inf>O<inf>3</inf> thin films grown by ALD using H<inf>2</inf>O or O<inf>3</inf> as oxidant source

“…As indicated in Fig. 3, both types of layers exhibit counter-clockwise hysteresis which is a consequence of charge trapping [4]. Although these results cannot be used to measure the trapping since the magnitude of the voltage shift is dependent on the sweep rate relative to the trapping-detrapping time constants [14], the difference in V h does indicate that larger trapping occurs in H 2 O-based layers.…”

“…Alumina (Al 2 O 3 ) is one of the most extensively studied high-k materials due to its relatively high dielectric constant, high thermal stability and good adhesion to many surfaces. In addition to the use of Al 2 O 3 as gate dielectric in MOSFETs [3], it is also of interest for a wide range of microelectronics applications, such as dynamic random access memories (DRAM) [4], organic light emitting devices [5], silicon solar cells [6], or microelectromechanical systems [7].…”