A highly integrated Ka-band MMIC quadrupler

Kamozaki, K.; Bos, Thomas; Camargo, E.

doi:10.1109/mwsym.2004.1335835

Cited by 9 publications

(5 citation statements)

References 8 publications

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“…Stoneham has reported a 34 GHz to 40 GHz frequency quadrupler realized by cascading two active doublers, a filter, three single transistor amplifiers and a balanced power amplifier in a single MMIC chip [8]. Another Ka-band cascaded MMIC quadrupler comprising a 9 GHz to 18 GHz doubler, 18 GHz buffer amplifier, a second stage doubler and a 36 GHz output amplifier has been reported [9].…”

Section: A Circuit Configurationmentioning

confidence: 99%

A 47 GHz high spectral purity frequency quadrupler for millimeter wave transceiver application

Biswas

Кумар

2014

2014 IEEE International Microwave and RF Conference (IMaRC)

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A 11.75 GHz to 47.0 GHz frequency quadrupler has been developed employing two diode based planar microstrip doublers and two commercially available MMIC amplifiers in a cascaded hybrid Microwave Integrated Circuit(MIC) configuration. More than 14 dBm of output power over 8.5% frequency bandwidth has been obtained with 13 dBm of input power. Spurious and harmonic suppression in excess of 80 dBc has been achieved without using any dedicated output filter. Output spectrum obtained is highly stable and of high spectral purity and thus the quadrupler becomes suitable for Millimeter Wave(MMW) transceiver applications.

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Section: A Circuit Configurationmentioning

confidence: 99%

A 47 GHz high spectral purity frequency quadrupler for millimeter wave transceiver application

Biswas

Кумар

2014

2014 IEEE International Microwave and RF Conference (IMaRC)

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“…Compared with passive multipliers, the active multipliers have the advantage of providing possible conversion gain. Cascading two frequency doublers is also generally used [3,4], but the suppression of the second harmonic is usually unsatisfactory. Balanced configuration is considered because it provides an efficient rejection of the fundamental and odd-harmonic frequency, and it is appropriate for implementation of a balanced VCO at the input [3,4,5,6].…”

Section: Introductionmentioning

confidence: 99%

“…Cascading two frequency doublers is also generally used [3,4], but the suppression of the second harmonic is usually unsatisfactory. Balanced configuration is considered because it provides an efficient rejection of the fundamental and odd-harmonic frequency, and it is appropriate for implementation of a balanced VCO at the input [3,4,5,6]. As a basic topology of multiplier MMIC, single frequency multiplier circuit structure is relatively simple, flexible and convenient design which is often used by designers [7], and cascading amplifier and band-pass filter can effectively compensate for the lack of conversion gain and harmonic suppression.…”

Section: Introductionmentioning

confidence: 99%

A Ka-band GaAs MMIC quadrupler with high dynamic range and efficient harmonics rejection

Dong

Huang

et al. 2017

IEICE Electron. Express

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Abstract:We report a Ka-band monolithic frequency quadrupler with high dynamic range and harmonics efficient rejection based on 0.15 µm GaAs PHEMT process in this letter. The quadrupler is constructed a drive power amplifier, a one-stage active quadrupling part, a high-pass filter, and a threestage power amplifier of the fourth harmonic. Efficient harmonics rejection is realized by harmonic restrain structure inside the quadrupling part and the filter between the quadrupling part and the output amplifier. According to the measured results, the output power reaches 20 dBm when input power ranges from −5 dBm to 1 dBm at an input frequency of 8.5 GHz. The harmonics rejections are larger than 40 dBc. The overall chip size is 3 × 2.2 mm 2 .

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“…Most of the proposed multipliers frequency structures consist of several stages with large dimensions [3]- [4]. They are associated with two pole high-pass filters [5 ]- [7] and buffer amplifiers [5 ]- [6].…”

Section: Introductionmentioning

confidence: 99%

A V-band MMIC frequency quadrupler with active input matching

Abata

Bekkali

Mazer

et al. 2015

2015 International Conference on Electrical and Information Technologies (ICEIT)

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In this paper, a V-band frequency quadrupler circuit is presented. This quadrupler operates in the millimeter-wave band [56-64 GHz] and it is designed according to the MMIC technology (Monolithic Microwave Integrated Circuit) in PHIS process from UMS foundry. The frequency quadrupler circuit will be used to generate carrier frequencies in the range of [56-64 GHz] in order to perform the RF signal demodulation of wireless communication link in the mm-wave band. The required output power is obtained by a buffer amplifier on the output. By adjusting the common-gate PHEMT circuit connected to the input, The conversion gain is about 6.9 dB and the input return-loss can be tuned for near ideal son match (>18 dB). The signal at the fundamental frequency is rejected with a rate greater than 40 dB compared to the desired signal. Keywords-Mm-wave band, two pole high pass jilter, buffer amplifier, Active input matching, MMIC Technology 978-1-4799-7479-5/15/$31.00 ©2015 IEEE

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A highly integrated Ka-band MMIC quadrupler

Cited by 9 publications

References 8 publications

A 47 GHz high spectral purity frequency quadrupler for millimeter wave transceiver application

A 47 GHz high spectral purity frequency quadrupler for millimeter wave transceiver application

A Ka-band GaAs MMIC quadrupler with high dynamic range and efficient harmonics rejection

A V-band MMIC frequency quadrupler with active input matching

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