A high-speed silicon FET for efficient DC-DC power conversion

Loechelt, G. H.; Grivna, Gordon; Golonka, L.; Hoggatt, Charles; Massie, H.; Pestel, F. De; Martens, Nick; Mouhoubi, S.; Roig, J.; Colpaert, T.; Coppens, P.; Bauwens, F.; Backer, E. De

doi:10.1109/ispsd.2012.6229029

Cited by 10 publications

(6 citation statements)

References 3 publications

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“…where C RSS is the feedback capacitance (C RSS = C GD ) and C ISS the input capacitance (C ISS = C GS + C GD ∼ C GS ). QV-FET technologies like the one presented in [6] have proven to show one order of magnitude lower C RSS /C ISS than advanced TG-FETs [14]. This improvement, represented in Fig.…”

Section: Near-zero Spurious Turn-onmentioning

confidence: 95%

“…Another existing model in the literature proposes an empirical expression for the same FoM [34]. For the sake of simplicity, (6) and 7omit the effect of the parasitic inductances and power diode reverse recovery that originates a visible asymmetry between turn-on and turn-off waveforms. LCB is less interesting for soft switching.…”

Section: Local Charge Balance and Hard Switchingmentioning

confidence: 99%

“…Both cases implement gate shielding by means of an additional plate electrode (P) between gate and drain. Shortening the plate to the source, a Q GD reduction is induced [6]; nonetheless, other functions will be discussed in this paper.…”

Section: Low‐voltage Silicon Power Mosfetsmentioning

confidence: 99%

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Overcoming switching limits in silicon power MOSFETs with silicon‐based solutions

Roig

Bauwens

2018

IET Power Electronics

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This work presents a review of new concepts and trends to push silicon power MOSFETs beyond their switching boundaries. The multiple issues encountered when increasing switching power loss and slew rate are thoroughly explained. Afterwards, a large variety of solutions are proposed in silicon technologies, all of them being experimentally proven and elucidated by physics-based simulations. Among these solutions, co-integrated snubbers, induced avalanche operation, local charge balance, tapered trenches, and cascoded configuration are suggested for low-and high-voltage power MOSFETs.

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Section: Near-zero Spurious Turn-onmentioning

confidence: 95%

Section: Local Charge Balance and Hard Switchingmentioning

confidence: 99%

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Overcoming switching limits in silicon power MOSFETs with silicon‐based solutions

Roig

Bauwens

2018

IET Power Electronics

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“…More details on the chip can be found in [10]. The FETs are 30-V trench power FETs with a shielded gate [11].…”

Section: Operation Of Synchronous Buck Convertermentioning

confidence: 99%

SPICE analysis of RL and RC snubber circuits for synchronous buck DC-DC converters

Blecic

Gillon

Nauwelaers

et al. 2015

2015 38th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO)

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Operation of a 1.3-MHz, 12-to-1.2 V, 20-A synchronous buck converter is analyzed by SPICE simulations. Special attention is given to two resonances formed by the capacitance of FETs in the off-state and the total inductance of the input decoupling network. The resonances are the main source of the broadband electromagnetic (EM) interference. Two most common circuit level methods for reducing the EM interference, an RL snubber circuit and an RC snubber circuit, are analyzed and compared in terms of their impact on the radiation characteristics, efficiency and reliability of the analyzed synchronous buck converter.

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“…Also this planar structure can be fabricated using fully LSI fine patterning process, so it has an advantage on the performance improvement by miniaturization. And the trench structure is used to form drain electrode at the bottom of the chip which can realize high heat dissipation by double-sided cooling [9]. Next, power MOSFETs having breakdown voltage from 500 V to 600 V are called high-voltage MOSFETs (HV-MOSFETs).…”

Section: Technical Trend Of Power Mosfetsmentioning

confidence: 99%

Recent technical trends and future prospects of IGBTs and power MOSFETs

Ogura

2014

2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE ASIA)

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In this paper, recent technical trends and future prospects of TGBTs and power MOSFETs is presented.Device technologies mainly for reducing power loss are discussed. This is because the reduction in power loss of these power devices is important for home and consumer appliances. Firstly, historical main road maps of these device technologies are introduced. Next, proposed future road maps and distinguishing results are also introduced. And, a comparison with TGBTs, power MOSFETs and SiCMOSFETs is discussed. Finally, T will conclude that Si power devices and SiC-power devices will coexist in home and consumer appliances by taking advantage of each characteristic in the near future.

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A high-speed silicon FET for efficient DC-DC power conversion

Cited by 10 publications

References 3 publications

Overcoming switching limits in silicon power MOSFETs with silicon‐based solutions

Overcoming switching limits in silicon power MOSFETs with silicon‐based solutions

SPICE analysis of RL and RC snubber circuits for synchronous buck DC-DC converters

Recent technical trends and future prospects of IGBTs and power MOSFETs

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