A High Speed Fully Integrated Capacitive Digital Isolation System in 0.35 µm CMOS for Industrial Sensor Interfaces

Altoobaji, Isa; Ali, Mohamed; Hassan, Ahmad; Audet, Yves; Lakhssassi, Ahmed

doi:10.1109/newcas50681.2021.9462788

Cited by 6 publications

(3 citation statements)

References 9 publications

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“…Digital isolators with common-mode transient immunity (CMTI) become basic devices in low-power applications. The development of digital isolators is directed towards two directions, reducing cost and optimizing performance [6]. Inductive coupling and capacitive coupling are two common forms of isolation in CMOS-based digital isolators.…”

Section: Introductionmentioning

confidence: 99%

A 25 Mbps 15 ns Propagation Delay 150 kV/μs CMTI Configurable Dual-Channel Capacitive Digital Isolation Driver

Zhao,

Wang,

Chen

et al. 2024

Micromachines

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Electrical isolation devices are essential components for safeguarding the reliability of electronic systems under harsh conditions. Digital isolators are widely used in low-power circuits due to their high immunity to disturbances. In this paper, a capacitive digital isolator for high-efficiency power supply scenarios is proposed with a high common-mode transient immunity (CMTI) and high data transmission rate. The on–off keying (OOK) modulation technique is used to ensure a high speed and accurate signal transmission. A fully integrated high-voltage level-shift driver with an ns-scale delay is proposed for increasing the drive capacity. Post-simulation results in Cadence IC 6.1.7 with the standard 0.18 μm CMOS process show that the proposed architecture achieves a 25 Mbps data transmission rate and 15 ns typical propagation delay with output peak currents of 2 A/4 A, respectively. Meanwhile, a CMTI of more than 150 kV/μs is realized.

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Section: Introductionmentioning

confidence: 99%

A 25 Mbps 15 ns Propagation Delay 150 kV/μs CMTI Configurable Dual-Channel Capacitive Digital Isolation Driver

Zhao,

Wang,

Chen

et al. 2024

Micromachines

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“…Capacitive isolators are implemented in silicon dioxide (SiO 2 ) technology which has a dielectric strength of up to 500 V/µm [8,9]. As a result, an isolation voltage of 1.5 kV rms can be achieved within a 3 µm SiO 2 thickness between metal-1 and metal-6 in a 0.18 µm CMOS process [10].…”

Section: Introductionmentioning

confidence: 99%

A Fully Integrated 0.6 Gbps Data Communication System for Inductive-Based Digital Isolator with 0.8 ns Propagation Delay and 10−15 BER

et al. 2023

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Digital isolators are implemented to protect low-voltage electronics and ensure human safety during high-voltage surge events. In this work, we present the design of an inductive-based digital isolation system that can sustain up to 1 kVrms breakdown voltage. The proposed system is designed using the pulse polarity modulation scheme and fabricated in a 0.35 μm CMOS. Two identical dies are bounded within the IC package, with one die housing the transmitter (Tx) and the isolation transformer, while the other die contains the receiver (Rx). Two different customized designs between three metal layers are implemented to form the isolation element. The transformer’s secondary coil is constructed in metal-1, while the primary coil is formed in metal-2 and metal-3 for comparing the system functionality, isolation capability, and propagation delay. The functionality has been verified by measurements for an operating frequency of 300 MHz with a 2.6 ns propagation delay and an energy consumption of 8.15 × 103 pJ/bit at 1 Mbps. The chip was tested under extreme temperatures and achieved a maximum measured common mode transient immunity (CMTI) of 500 V/μs. Jitter has been examined to ensure fast transmission at a bit error rate (BER) of 10−15 with a total jitter (TJ) of 188.18 ps.

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“…More work and research were done in these methods. For example, using inductive-coupled to get less power consumption [13], to receive high common-mode transient immunity [14], and using capacitive-coupled to build a high speed fully integrated capacitive digital isolation system [15].…”

Section: Introductionmentioning

confidence: 99%

A dV/dt noise canceling circuit of capacitive-isolated gate drivers

Zhang

Liu

Quan

et al. 2022

IEICE Electron. Express

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For capacitive-isolated gate drivers, the pulse width distortion (PWD) and common mode transient immunity (CMTI) are vital factors to evaluate its performance. In this paper, an envelope detection circuit and a dV/dt noise canceling circuit of capacitive-isolated gate drivers is designed based on X-FAB 0.35μm CMOS process. With these structures, this gate driver alleviates PWD and improve CMTI. Spectre simulation results show that the gate driver achieves 200kV/μs CMTI with 50ns propagation delay and maximum 7.4ns PWD. Besides, it has better robustness to fabrication process and temperature variation than conventional methods.

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A High Speed Fully Integrated Capacitive Digital Isolation System in 0.35 µm CMOS for Industrial Sensor Interfaces

Cited by 6 publications

References 9 publications

A 25 Mbps 15 ns Propagation Delay 150 kV/μs CMTI Configurable Dual-Channel Capacitive Digital Isolation Driver

A 25 Mbps 15 ns Propagation Delay 150 kV/μs CMTI Configurable Dual-Channel Capacitive Digital Isolation Driver

A Fully Integrated 0.6 Gbps Data Communication System for Inductive-Based Digital Isolator with 0.8 ns Propagation Delay and 10−15 BER

A dV/dt noise canceling circuit of capacitive-isolated gate drivers

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