2010
DOI: 10.1063/1.3354027
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A high-k Tb2TiO5 nanocrystal memory

Abstract: Articles you may be interested inStructural and electrical characteristics of high-k Tb 2 O 3 and Tb 2 TiO 5 charge trapping layers for nonvolatile memory applications

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Cited by 22 publications
(23 citation statements)
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“…For this value of the coordination number, at zero field, our results coincide with those by Bublitz et al MFA-2 k B T N /J = 7.83 [16]. This numerical result is also comparable to other different methods, such as high-temperature expansion k B T N /J = 5.53 [17], EFT-2 k B T N /J = 6.94 , and EFT-4 k B T N /J = 6.89 [5].…”
Section: Resultssupporting
confidence: 90%
“…For this value of the coordination number, at zero field, our results coincide with those by Bublitz et al MFA-2 k B T N /J = 7.83 [16]. This numerical result is also comparable to other different methods, such as high-temperature expansion k B T N /J = 5.53 [17], EFT-2 k B T N /J = 6.94 , and EFT-4 k B T N /J = 6.89 [5].…”
Section: Resultssupporting
confidence: 90%
“…A wellcrystallized high-k structure can increase the effective electric field across the tunneling oxide, and thus enhance deep-level electron trapping. From the AFM image of the sample annealed at 900 C, a large grain size, which implies a high deep-level trap density, can be detected from a larger surface roughness [18]. This trend was consistent with the XRD data.…”
Section: Resultssupporting
confidence: 84%
“…Furthermore, the crystallization of HfTiO 4 and higher roughness values can be detected in AFM images. 14,15 Because of the higher quality of the trapping layer, a more effective electric field can access the HfTiO 4 trapping layer and create a higher trapping rate. 14 Therefore, a larger memory window and a higher V FB shift representing a better device storage capacity can be achieved.…”
Section: Resultsmentioning
confidence: 99%
“…11 After the programming operation, the device with an annealing temperature of 950 C performed better, with a larger positive V FB (flat band voltage) shift than the device with the lower annealing temperature of 800 C. 12,13 Therefore, proper annealing can also enhance the P/E speed, because annealing improves the high-k layer quality and increases electron trapping by increasing the effective electric field across the tunneling oxide. 14 Material analyses, including XRD and AFM, were conducted in order to gain an in-depth understanding of the improvements in the electrical characteristics of the device. In order to probe into the crystalline structure of the high-k HfTiO 4 , XRD was used to analyze the as-deposited sample and the samples with RTA treatment at 600 C, 700 C, 800 C, 900 C, and 950 C, respectively.…”
Section: Resultsmentioning
confidence: 99%