A guide to migrating from microprocessor to FPGA coping with the support tool limitations

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“…For instance, the synthesis tools available for high-level languages (e.g. VHDL behavioural and Verilog) are still not efficient, and a VHDL developer has to follow strict rules to obtain good results [5,26]. An FPGA configuration bitstream generated from a high-level language is space consuming, and represents a lower performer circuit when compared to one generated from schematic diagrams or low level languages such as VHDL structural.…”

“…The internal organisation of the reconfigurable devices available, makes the development of good synthesis tools for high level programming languages an arduous job. Even when using hardware description languages as, for instance, VHDL, the developer of spacecraft computers has to keep the code as simple as possible, in order to avoid problems for the synthesis tool [5]. For instance, in systems that require complex data structures or many levels of nested loops, the best solution maybe to still use conventional microprocessor based boards.…”

An adaptive communications module for on-board computers of satellites

“…VHDL, Verilog, C like languages). However, it is important to highlight that writing a code targeting a microprocessor compiler is still much easier than writing a similar code targeting a synthesis tool for a hardware implementation [3]. Despite all the restrictions imposed by the EDA tools, there are significant advantages to start by using a hardware description language as VHDL in new embedded designs.…”