A global view of interconnects

Electrical Breakdown in Advanced Interconnect Dielectrics

“…The two models also define the strategic differences taken to identify a root cause explanation for dielectric breakdown: for the 1/E-model, a fluence model leading to impact ionization damage [359]; 0 ULK LK LK Gate oxide SiCOH, 90 nm SiO 2 _PECVD [Noguchi, 2001] SiOF [Ogawa, 2003] SiCOH [Ogawa, 2003] SiCOH [Aubel, 2011;unpublished] pMSQ [Ogawa, 2003] SiCOH SiCN pSiCOH, 50 nm pSiCOH, 90 nm pSiCOH, MOS Figure 11.14 A dielectric breakdown comparison is shown for different dielectrics. There are also a couple of interesting observations that demonstrate the importance of process/integration quality: (1) for similar LKs, a more recent process shows superior TDDB performance compared to earlier results; (2) in comparatively integrated structures, both LK with SiC x N y capping dielectric and SiC x N y -only structures show very similar TDDB, indicating that capping dielectric breakdown is also important; (3) TDDB in a MOS structure with ULK only shows better nominal TDDB (it needs an area-scaling correction, however) than integrated ULK and a tighter space integrated-ULK shows a worse performance than a wider space ULK (see color Plate 13) for the E-model, a field-driven model, where dipole-field coupling reduces the activation energy for thermally induced bond breakage [34]. ; however, a clear trend to lower breakdown performance with a decreasing k value is evident.…”

“…The introduction of new materials (Cu for electrical resistivity and low-k dielectrics for capacitance) was needed to ameliorate the effects of increased RC interconnect delay due to interconnect dimensional shrinkage [1,2]. In essence, the critical dimensions continued to scale downward by a factor of about 0.7 per technology generation, but the materials and processes that were used to build up the integrated stack were essentially the same; namely Al (with Cu x doping) for the metallization and SiO 2 as the interlevel dielectric.…”

Analysis of Barrier Defects in Low-k/Cu Interconnects Based on Electrochemical Response and Simulation Cell

“…In other words, the preferred state is Cu, not Cu ions. This preference can be seen from the standard potentials for the oxidation reactions (1) to (3), which are in the positive range. As previously stated, the value of E o is the potential required to maintain the ionized state compared to the standard hydrogen redox reaction, which is defined to be 0 V. For example, reaction (1) can occur only when an external potential greater than +0.34 V is applied to Cu to make it more anodic than the hydrogen electrode.…”

“…[1][2][3] At the same time, on-chip metrology capability is also facing challenges as new methods are needed to accommodate the increased complexity of the wiring levels. One area in particular, i.e., the ultrathin diffusion barrier (Ta), has been drawing much attention as the thickness of the barrier layer shrinks to a few nanometers (<2 nm after 2015).…”

<em>In Situ</em> Time-dependent Dielectric Breakdown in the Transmission Electron Microscope: A Possibility to Understand the Failure Mechanism in Microelectronic Devices

“…The combination of new materials, e.g., Cu for reduced resistance and low-k/ULK dielectrics for lower capacitance, overcomes the effects of increased resistancecapacitance (RC) delay caused by interconnect dimensional shrinkage 2,3 . However, this benefit was encroached by the continuing aggressive scaling of microelectronic devices in recent years.…”