A Generalized Scheme With Linear Power Balance and Uniform Switching Loss for Asymmetric Cascaded H-Bridge Multilevel Inverters

Ye, Manyuan; Peng, Ruifan; Tong, Ziwei; Chen, Zihao; Miao, Zhilin

doi:10.1109/tpel.2021.3114369

Cited by 10 publications

(3 citation statements)

References 21 publications

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“…In the study of the active filter with CVD, it is found that the dc voltage deviation will appear in the CVD composed of series capacitors, which is similar to the phenomenon of capacitor voltage imbalance in multilevel inverters [23]- [25]. The voltage imbalance of dc-link series capacitors in multilevel inverters is mainly caused by the inconsistency of devices and the unbalanced control in some structures [23]- [28]. However, the reason for the dc voltage deviation of the active filter with CVD is different.…”

mentioning

confidence: 88%

Regulating the DC Voltage of Capacitive Divider Through Variable Switching Dead-Time in the Three-Phase Inverter With an Active Filter

Huang

2023

IEEE Open J. Power Electron.

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In three-phase inverters, high output common-mode voltage (CMV) will bring many negative effects. The active filter with a capacitive voltage divider (CVD) can effectively suppress the peaks of CMV both in the time-domain and frequency-domain. In practice, it is found that the dc voltage of active filter from the CVD will deviate. In this paper, it is found that the deviation comes from the switching dead-time of the active filter. Based on the study in regard to the influence of switching dead-time on the dc voltage of CVD, a variable switching dead-time (VSDT) scheme is proposed. The VSDT scheme can make the voltage of CVD approach the ideal voltage and lead the maximum spectral peak of the CMV to the lowest. The feasibility and effectiveness of the VSDT scheme are verified by the simulations and experiments in a three-phase inverter.

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mentioning

confidence: 88%

Regulating the DC Voltage of Capacitive Divider Through Variable Switching Dead-Time in the Three-Phase Inverter With an Active Filter

Huang

2023

IEEE Open J. Power Electron.

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“…The power imbalance leads to large differences in the utilization ratio of H-bridge units and DC voltage sources. These differences seriously reduce the reliability of the inverters and increase their maintenance cost [18][19][20]. Therefore, it is necessary to realize power balance between cascaded H-bridge units under the LS-RPWM strategy.…”

Section: Power Balance Optimizationmentioning

confidence: 99%

Modified RPWM Strategy Based on Level-Shifted Random Carrier and Power Balance to Reduce the PWM Voltage Noise in Three-Phase CHB Inverters

2023

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Aimed at the pulse width modulation (PWM) voltage noise and power imbalance in three-phase cascaded H-Bridge (CHB) inverters, a modified random PWM (RPWM) strategy, named the power-balanced RPWM (PB-RPWM) strategy, is proposed in this paper. The PB-RPWM strategy mainly includes three steps: (1) random pulse signals are generated by compared modulation wave with level-shifted random carriers; (2) the random pulse signals are circularly distributed between CHB units by a logic operation method, and then the driving pulse signals of switching devices are produced; (3) the driving pulse signals are used to control the inverter. Under the PB-RPWM strategy, the spectra of the line voltage become uniform and continuous, that is, the PWM voltage noise of the line voltage can be effectively reduced. The output voltage of a single H-bridge unit can contain three basic voltages within 3/2 TA, that is, the power balance between CHB units can be realized. When compared with conventional non-random and random PWM strategies, the PB-RPWM strategy has a lower PWM voltage noise and smaller total harmonic distortion (THD). When compared with the level-shifted PWM (LS-PWM) strategy, the PB-RPWM strategy has a balanced power performance. The effectiveness and feasibility of the PB-RPWM strategy is verified by abundant simulations and experiments.

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“…The algorithm also results in reduced steady-state errors and fluctuations. Reference [28] introduces a power balance modulation strategy that aims to equalize the switching loss of certain cells by adjusting the triangular carriers. Furthermore, it controls the conducting angle of the other cell to achieve a balanced power distribution among cascaded cells when operating at full modulation indexes.…”

Section: Introductionmentioning

confidence: 99%

An Analysis and Optimization of the Battery Capacity Difference Tolerance of the Modular Multi-Level Half-Bridge Energy Storage Converter

Pan,

Wang,

Buja

2023

Energies

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As a power converter of battery energy storage, the multi-level converter and its battery balancing control have received much attention from scholars. This paper focuses on the modular multi-level half-bridge energy storage converter (MMH-ESC), including its topology, working principle, and pulse width modulation (PWM) methods. Under the battery balancing control strategy based on level-shifted carrier PWM (LS-PWM), formulas are derived and calculations are performed to get the charge or discharge of each submodule (SM), thereby obtaining the tolerance for capacity differences among these batteries. A range of battery capacity values that can maintain a balanced state is provided to enhance flexibility in battery configuration and utilization, avoiding the limitation of all batteries to the same capacity. Finally, a new bridge arm modulation wave allocation method is proposed. This method significantly expands the range of SM battery capacity selection and provides a high-tolerance modulation method for the converter under extreme or even fault conditions.

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A Generalized Scheme With Linear Power Balance and Uniform Switching Loss for Asymmetric Cascaded H-Bridge Multilevel Inverters

Cited by 10 publications

References 21 publications

Regulating the DC Voltage of Capacitive Divider Through Variable Switching Dead-Time in the Three-Phase Inverter With an Active Filter

Regulating the DC Voltage of Capacitive Divider Through Variable Switching Dead-Time in the Three-Phase Inverter With an Active Filter

Modified RPWM Strategy Based on Level-Shifted Random Carrier and Power Balance to Reduce the PWM Voltage Noise in Three-Phase CHB Inverters

An Analysis and Optimization of the Battery Capacity Difference Tolerance of the Modular Multi-Level Half-Bridge Energy Storage Converter

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