Regulating the DC Voltage of Capacitive Divider Through Variable Switching Dead-Time in the Three-Phase Inverter With an Active Filter

Abstract

In three-phase inverters, high output common-mode voltage (CMV) will bring many negative effects. The active filter with a capacitive voltage divider (CVD) can effectively suppress the peaks of CMV both in the time-domain and frequency-domain. In practice, it is found that the dc voltage of active filter from the CVD will deviate. In this paper, it is found that the deviation comes from the switching dead-time of the active filter. Based on the study in regard to the influence of switching dead-time on the dc voltage of CVD, a variable switching dead-time (VSDT) scheme is proposed. The VSDT scheme can make the voltage of CVD approach the ideal voltage and lead the maximum spectral peak of the CMV to the lowest. The feasibility and effectiveness of the VSDT scheme are verified by the simulations and experiments in a three-phase inverter.