2012
DOI: 10.1016/j.sna.2012.01.019
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A gated single-photon avalanche diode array fabricated in a conventional CMOS process for triggered systems

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Cited by 22 publications
(15 citation statements)
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“…2b where the avalanche diode consists of a p þ/n-well junction surrounded by a low doped p-well [3][4][5]. This layout may violate the design rules of a standard CMOS process as the intersection of diffusion and well regions, e.g.…”
Section: Low Doped Guard Ringmentioning
confidence: 99%
See 1 more Smart Citation
“…2b where the avalanche diode consists of a p þ/n-well junction surrounded by a low doped p-well [3][4][5]. This layout may violate the design rules of a standard CMOS process as the intersection of diffusion and well regions, e.g.…”
Section: Low Doped Guard Ringmentioning
confidence: 99%
“…During the last few years active R&Ds have been studying the implementation of these devices in the field of High Energy Physics and Medical Physics for the detection of ionizing particles in tracking applications [4,5] opening a new promising path of application for this type of device. A Geiger-mode avalanche diode consists of a p-n junction which is reverse biased above the breakdown voltage so that a single electron-hole pair generated in the space charge region of the junction can trigger an avalanche process by impact ionization, giving rise to a macroscopic electrical signal [1][2][3].…”
Section: Introductionmentioning
confidence: 99%
“…However, the SPAD's photon detection efficiency (PDE) is not severely reduced, as it could be expected. A good enough PDE has been demonstrated with these sensors biased at low overvoltages [27].…”
Section: E Vilella a Diéguez / Microelectronics Journal ] (]]]]) ]mentioning
confidence: 99%
“…In this work, the gated operation is controlled by means of two external signals (RST and INH) implemented through MOS transistors (M N0 and M P0 ) [23]. The sensing node V S is connected to the readout electronics, which is based on a CMOS inverter (M P1 and M N1 ) that converts the analog voltage generated as a result of a real or noise hit into a digital pulse.…”
Section: Device Under Test (Dut)mentioning
confidence: 99%
“…Short gated 'on' periods and long gated 'off' periods allow to reduce the probability to detect the fake hits [23]. However, a low duty cycle (i.e., t on (t on þt off ) À 1 ) also reduces the probability to detect the real hits.…”
Section: Test Beam Setupmentioning
confidence: 99%