A Functional Novel Logic for Max/Min Computing in One-Transistor-One-Resistor Devices With Resistive Random Access Memory (RRAM)

Huang, Wei‐Chen; Chen, Po-Hsun; Chang, Ting‐Chang; Zheng, Haimei; Yeh, Yu‐Hsuan; Wu, Chang-Mou; Tan, Yung‐Fang; Lin, Shih‐Kai; Wu, Po Kuei; Sze, Simon M.

doi:10.1109/ted.2022.3150285

Cited by 6 publications

(3 citation statements)

References 29 publications

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“…Conventional memory storage devices, such as flash memory, are approaching their limit in time to come. Recently, resistance-dependent novel memories, including magnetic random-access memory (MRAM), phase-change random access memory (PRAM), and resistive switching-based random-access memory (RRAM), have gained popularity in place of conventional three-terminal charge-based memory devices due to their dominant, simplistic 2-terminal structure, and broad device integration rate. − Among them, RRAM devices attract researchers because of their simple metal–insulator–metal (MIM) and metal–insulator–semiconductor (MIS) structures with nonvolatile nature, excellent endurance stability (>10 3 ), fast switching response (<10 ns ), and a long retention time (>10 3 s). − As the integration scale continues to minimize, the density of devices can be increased on a smaller area and exhibit much better performance by utilizing multiple active cells. It can be achieved by fabricating a vertically stacked crossbar arrangement structure, which increases the memory storage density to a larger extent.…”

Section: Introductionmentioning

confidence: 99%

Self-Rectifying Gr/TMDC Heterostructures: Candidates for Resistive Switching Memory Devices

Aftab,

Ali,

Mehmood

et al. 2024

ACS Appl. Electron. Mater.

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Self-rectifying graphene-transition metal dichalcogenides (Gr/TMDCs)-based resistive random-access memory (ReRAM or RRAM) has been shown to be a promising candidate for next-generation nonvolatile memory technology. However, the low resistance on/off ratio and the high operating voltage are still big challenges for low power-consuming devices. Here, we reported Au/Gr/MoS 2 /Au-and Au/Gr/WS 2 /Au-based ReRAM structures, thereby operating at a low voltage with a high on/off current ratio of ∼10 3 . Also, our results showed excellent endurance (∼2 × 10 2 cycles) and stable retention performance (∼10 4 s), which demonstrate the promising characteristics of memory devices. Additionally, in the Au/Gr/WS 2 /Au structure, the rectifying zone is observed at −2 V, which prevents interference with adjacent cells during reading operations. In reverse bias, the purposed device has an intrinsically self-rectifying property, not requiring to reset the device for operation. The self-rectifying property of the Au/Gr/ WS 2 /Au structure allows it to cover a 48 × 49 RRAM array. This research on Gr/TMDCs-based RRAM provides the basis for future miniaturization of nanoelectronics.

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Section: Introductionmentioning

confidence: 99%

Self-Rectifying Gr/TMDC Heterostructures: Candidates for Resistive Switching Memory Devices

Aftab,

Ali,

Mehmood

et al. 2024

ACS Appl. Electron. Mater.

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“…The RRAM elements integrated into a one-transistor-one-resistor (1T1R) configuration can enable crossbar arrays in a cost and energy-efficient way. The 1T1R configuration has recently been utilized in power-efficient signal processing using reservoir computing and has also been used to demonstrate Boolean logic capabilities beneficial for in-memory computing. − …”

Section: Introductionmentioning

confidence: 99%

Effects of Interface Oxidation on Noise Properties and Performance in III–V Vertical Nanowire Memristors

Ram

Svensson

Wernersson

2023

ACS Appl. Mater. Interfaces

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Memristors implemented as resistive random-access memories (RRAMs) owing to their low power consumption, scalability, and speed are promising candidates for in-memory computing and neuromorphic applications. Moreover, a vertical 3D implementation of RRAMs enables high-density crossbar arrays at a minimal footprint. Co-integrated III−V vertical gate-all-around MOSFET selectors in a one-transistor-one-resistor (1T1R) configuration have recently been demonstrated where an interlayer (IL)-oxide has been shown to enable high RRAM endurance needed for applications like machine learning. In this work, we evaluate the role of the IL-oxide directly on InAs vertical nanowires using low-frequency noise characterization. We show that the low-frequency noise or the 1/f-noise in InAs vertical RRAMs can be reduced by more than 3 orders of magnitude by engineering the InAs/high-k interface. We also report that the noise properties of the vertical 1T1R do not degrade significantly after RRAM integration making them attractive to be used in emerging electronic circuits.

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“…Therefore, the LTPS with a fin-like structure is developed [29][30][31]. Our previous studies have proposed a LTPS-based non-volatile memory (NVM) device [32,33]. The LTPS transistor with a fin-like structure can have advantages including small device dimensions with excellent on-off characteristics.…”

mentioning

confidence: 99%

Investigating DC and AC degradation behaviors to P-type low temperature polycrystalline silicon thin film transistor with fin-like structure

Chen¹,

Zheng

Yeh

et al. 2023

J. Phys. D: Appl. Phys.

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Currently, thin film transistor (TFT) based on planar structure is widely used in the applications of display panels. However, when the device is scaling-down, new device structures or novel materials should be introduced. In this work, the low temperature polycrystalline silicon (LTPS) TFT with fin-like structure is investigated. On the basis of electrical measurements, the device features good switching characteristics with low operating voltages. However, the Id-Vg sweeping result exhibits off-state leakage, which is known as the gate-induced drain leakage (GIDL) current. The GIDL current is increased with the drain bias and the temperature increasing. To observe the GIDL current degradations, different gate biases with negative bias stress (NBS) and positive bias stress (PBS) are applied. The results show different degradation behaviors. In addition, bias stresses with DC and AC methods are also applied to verify the device reliability. Both threshold voltage (Vt) shift and sub-threshold swing (S.S.) are also extracted to verify the degradations of the device. Finally, the physical models are also proposed to illustrate the degradation behaviors of the LTPS device with a fin-like structure, which can be beneficial to future related development of LTPS-based devices.

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A Functional Novel Logic for Max/Min Computing in One-Transistor-One-Resistor Devices With Resistive Random Access Memory (RRAM)

Cited by 6 publications

References 29 publications

Self-Rectifying Gr/TMDC Heterostructures: Candidates for Resistive Switching Memory Devices

Self-Rectifying Gr/TMDC Heterostructures: Candidates for Resistive Switching Memory Devices

Effects of Interface Oxidation on Noise Properties and Performance in III–V Vertical Nanowire Memristors

Investigating DC and AC degradation behaviors to P-type low temperature polycrystalline silicon thin film transistor with fin-like structure

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