A fully on-chip LDO voltage regulator for remotely powered cortical implants

Majidzadeh, Vahid; Schmid, Alexandre; Leblebici, Yusuf

doi:10.1109/esscirc.2009.5325969

Cited by 23 publications

(11 citation statements)

References 7 publications

(11 reference statements)

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“…The regulator circuit has been realized in a 0:18lm CMOS technology, and experimentally characterized [20]. Figure 10 shows the microphotograph of the voltage regulator with an active chip area of 290 lm Â 360 lm, which is dominated by on-chip MOS capacitors.…”

Section: Stand-alone Voltage Regulator Characteristicsmentioning

confidence: 99%

A fully on-chip LDO voltage regulator with 37 dB PSRR at 1 MHz for remotely powered biomedical implants

Majidzadeh

Silay

Schmid

et al. 2010

Analog Integr Circ Sig Process

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This article presents a fully on-chip low-power LDO voltage regulator dedicated to remotely powered wireless cortical implants. This regulator is stable over the full range of alternating load current and provides fast load regulation achieved by applying a time-domain design methodology. Moreover, a new compensation technique is proposed and implemented to improve PSRR beyond the performance levels which can be obtained using the standard cascode compensation technique. Measurement results show that the regulator has a load regulation of 0.175 V/A, a line regulation of 0.024%, and a PSRR of 37 dB at 1 MHz power carrier frequency. The output of the regulator settles within 10-bit accuracy of the nominal voltage (1.8 V) within 1.6 ls, at full load transition. The total ground current including the bandgap reference circuit is 28 lA and the active chip area measures 290 lm 9 360 lm in a 0.18 lm CMOS technology.

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Section: Stand-alone Voltage Regulator Characteristicsmentioning

confidence: 99%

A fully on-chip LDO voltage regulator with 37 dB PSRR at 1 MHz for remotely powered biomedical implants

Majidzadeh

Silay

Schmid

et al. 2010

Analog Integr Circ Sig Process

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“…Capacitor CL stands for the capacitive load. The current Load (IL) represents the load whose current is supplied by the power transistor [1], [2], [4], [5].…”

Section: Ldo Architecturementioning

confidence: 99%

Fast Transient Response Low Drop-Out Voltage Regulator

Akhamal¹,

Chakir²,

Qjidaa³

2014

IJESA

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A design of fast transient response low drop out voltage regulator (LDO) is presented. The requirement of fast transient response is dependent on the loading condition. In high speed applications, chips runs at MHz frequency, so the load current changes from zero to full value and so forth in a very small time. In such cases circuit with fast transient response is a definite requirement. This LDO is implemented in 0.18um generic CMOS technology; it generates fixed 1.6V from a supply of 3.6V which on discharging goes down to 1.9V. The buffer stage used is a wide band OTA capable of providing rail-to-rail swing and full current for charging and discharging the large driver transistor capacitance, that enables fast slewing. Simulation result shows that the proposed circuit provides full load transient response of less than 44ns settling time and less than 15mV undershoot.

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“…The voltage regulator is connected to the output of the rectifier to produce a clean supply voltage to the implanted electronics. For proper operation of the regulator presented in [5], the output of the rectifier should always be larger than 2.1 V. Moreover, the ripple should be less than 100 mV pp to have sufficiently clean dc voltage at the output of the regulator. For this study, the average rectifier output voltage is chosen as 2.2 V, with added tolerance.…”

Section: Optimization For Optimum Load Conditionmentioning

confidence: 99%

Load optimization of an inductive power link for remote powering of biomedical implants

Silay

Dondi

Larcher

et al. 2009

2009 IEEE International Symposium on Circuits and Systems

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Abstract-This article presents the analysis of the power efficiency of the inductive links used for remote powering of the biomedical implants by considering the effect of the load resistance on the efficiency. The optimum load condition for the inductive links is calculated from the analysis and the coils are optimized accordingly. A remote powering link topology with a matching network between the inductive link and the rectifier has been proposed to operate the inductive link near its optimum load condition to improve overall efficiency. Simulation and measurement results are presented and compared for different configurations. It is shown that, the overall efficiency of the remote powering link can be increased from 9.84% to 20.85% for 6 mW and from 13.16% to 18.85% for 10 mW power delivered to the regulator, respectively.

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A fully on-chip LDO voltage regulator for remotely powered cortical implants

Cited by 23 publications

References 7 publications

A fully on-chip LDO voltage regulator with 37 dB PSRR at 1 MHz for remotely powered biomedical implants

A fully on-chip LDO voltage regulator with 37 dB PSRR at 1 MHz for remotely powered biomedical implants

Fast Transient Response Low Drop-Out Voltage Regulator

Load optimization of an inductive power link for remote powering of biomedical implants

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