A fully integrated low-power 5-GHz CMOS RF receiver for WLAN applications

Abstract

ABSTRATIn this paper, a fully integrated 5-GHz dual conversion receiver for IEEE 802.11a/n wireless LAN applications is reported. In this proposed receiver, for the high linearity and low power consumption, receiver utilizes the dual conversion current driven passive mixer with linear transconductor stage. The optimum allocation of the gain and filter rejection of each cell in the baseband analog (BBA) chain is performed to minimize current consumption. The fully integrated receiver is fabricated in 0.13 µm CMOS technology and RF front-end input-referred thirdorder intercept point (IIP3) of -15.8 dBm with a gain of 37.2 dB and receiver noise figure (NF) of 7.1 dB are obtained with 49.2 mW power consumption.