A Fully Integrated 0.18-&amp;gt;tex&amp;lt;$mu$&amp;gt;/tex&amp;lt;m CMOS Direct Conversion Receiver Front-End With On-Chip LO for UMTS

Gatta, F.; Manstretta, Danilo; Rossi, Paolo; Svelto, F.

doi:10.1109/jssc.2003.820865

Cited by 56 publications

(18 citation statements)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In certain applications where the filtering is critical but the blocker level is not as strong as those in GSM, the down-conversion mixer power consumption could be lowered significantly. A good example is 3G applications [13], as mentioned earlier, where due to the TX leakage in the receiver band, typically an external SAW filter at the input is required. Although to relax the receiver front-end linearity a notch filer at the TX frequency (190 MHz away for band I, for example) is needed, the blocker strength is fairly weak, around −20 to −30 dBm for most typical duplexers.…”

Section: Conclusion and Discussionmentioning

confidence: 99%

See 1 more Smart Citation

Overview of Front‐End RF Passive Integration into SoCs

Hueber

Staszewski²

2010

Multi‐Mode/Multi‐Band RF Transceivers for Wireless Communications

View full text Add to dashboard Cite

Section: Conclusion and Discussionmentioning

confidence: 99%

“…6 Example of receiver problems due to blockers with the SAW filter removed. isolation in the TX band, it can shown that with typical blocker levels specified in the 3GPP standard, this could lead to an IIP3 requirement of somewhere around −5 to 5 dBm [13].…”

Section: Introductionmentioning

confidence: 99%

Overview of Front‐End RF Passive Integration into SoCs

Hueber

Staszewski²

2010

Multi‐Mode/Multi‐Band RF Transceivers for Wireless Communications

View full text Add to dashboard Cite

“…For example, GSM 900 MHz receivers require operating frequencies between 0.925 to 0.960 GHz [1]. QOs are important for receivers and examples of reasons are as follows: a) Hartley and Weaver image-reject receivers [2], superheterodyne receivers [3], zero-intermediate frequency (zero-IF) or direct-conversion receivers [4], low-IF [5], digital IF [3] receivers and direct digital or digital RF receivers [3] employ the quadrature downconverter. b) Double low-IF and wide-band IF receivers [3] employ the double quadrature downconverter.…”

Section: Introductionmentioning

confidence: 99%

A low-power high-frequency all-pass-filter-based sinusoidal quadrature oscillator using CMOS current mirrors

Leelasantitham

Srisuchinwong

2009

2008 International Symposium on Intelligent Signal Processing and Communications Systems

View full text Add to dashboard Cite

A low-power high-frequency sinusoidal quadrature oscillator is presented through the use of two allpass current mirror (CM)-based filters, a 1st-order CM lowpass filter and a CM bilinear transfer function. The bilinear transfer function is described in terms of a negative resistance (R N = -R L ) where R L is a resistor load of a current mirror. The technique is relatively simple based on (i) inherent time constants of current mirrors, i.e. the internal capacitances and the transconductance of a diode-connected NMOS, (ii) a simple negative resistance R N formed by a resistor load R L of a current mirror. Neither external capacitances nor inductances are required. As a particular example, a 1.01-GHz, 0.6-mW, 2-V CMOS all-pass-filter-based all-current-mirror sinusoidal quadrature oscillator is demonstrated in this paper. The oscillation frequency (f 0 ) is 1.01 GHz and is current-tunable over a range of 400 MHz or 40 %. The power consumption is at approximately 0.6 mW. The amplitude matching and the quadrature phase matching are better than 0.05 dB and 0.15°, respectively. Total harmonic distortions (THD) are less than 0.5 %. At 2 MHz offset from the 1.01 GHz, the carrier to noise ratio (CNR) is 83.01 dBc/Hz whilst the figure of merit called a normalized carrier-to-noise ratio (CNR norm ) is 139.29 dBc/Hz. The ratio of the oscillation frequency (f 0 ) to the unity-gain frequency (f T ) of a transistor is 0.134.

show abstract

“…As an example, a + 24 dBm transmitted signal, corresponding to a class III UMTS handset determines a leakage into the receiver input of − 30 dBm, taking into account the isolation provided by a typical commercial duplexer. Meeting the sensitivity requirement of the standard involves a trade off between noise figure, second-order intermodulation distortion and phase noise [1]. The minimum IIP2 at the antenna connector must be grater than + 46 dBm.…”

Section: Introductionmentioning

confidence: 99%

A 0.18 μm CMOS direct down-converter for highly integrated 3G receivers

Brandolini

Rossi

Sanzogni

et al. 2007

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

This paper presents the design of a high dynamic range direct down-converter for 3G cell-phone applications. The mechanisms responsible for second-order intermodulation distortion are discussed in details, leading to the following design strategy: the transconductor is degenerated by means of an RC filter, an LC network resonating at RF frequency loads the switching pair and carefully matched resistors are used in the output load. Prototypes realized in 0.18 µm CMOS show: + 78 dBm IIP2 minimum among 40 samples, + 10 dBm IIP3, 4 nV/ √Hz input-referred noise density while burning only 4 mA from 1.8 V.

show abstract

A Fully Integrated 0.18->tex<$mu$>/tex<m CMOS Direct Conversion Receiver Front-End With On-Chip LO for UMTS

Cited by 56 publications

References 12 publications

Overview of Front‐End RF Passive Integration into SoCs

Overview of Front‐End RF Passive Integration into SoCs

A low-power high-frequency all-pass-filter-based sinusoidal quadrature oscillator using CMOS current mirrors

A 0.18 μm CMOS direct down-converter for highly integrated 3G receivers

Contact Info

Product

Resources

About