A Fully Differential 60 GHz Receiver Front-End with Integrated PLL in SiGe:C BiCMOS

Sun, Yongli; Glisic, Srdjan; Peters, Frank

doi:10.1109/emicc.2006.282786

Cited by 28 publications

(22 citation statements)

References 8 publications

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“…Today's applications already include high-speed communication systems at 60 GHz [51]- [54] or automotive radar systems at 77 GHz [55], [56]. Additionally, state-of-the-art CMOS technologies have shown competitive performances [57], [58], although they lack behind in available output power.…”

Section: Outlook and Conclusionmentioning

confidence: 97%

Opportunities for silicon at mmWave and Terahertz frequencies

Pfeiffer

Öjefors

Lisauskas

et al. 2008

2008 IEEE Bipolar/BiCMOS Circuits and Technology Meeting

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This paper summarizes opportunities for silicon process technologies at mmWave and Terahertz frequencies and demonstrates key building blocks for 94-GHz and 600-GHz imaging arrays. It reviews potential applications and summarizes state-of-the-art terahertz technologies. Terahertz focal-plane arrays (FPAs) for video-rate imaging applications have been fabricated in commercially available CMOS and SiGe process technologies respectively. The 3×5 arrays achieve a responsivity of up to 50 kV/W with a minimum NEP of 400 pW/ √ Hz at 600 GHz. Images of postal envelopes are presented which demonstrate the potential of silicon integrate 600-GHz terahertz FPAs for future low-cost terahertz camera systems.

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Section: Outlook and Conclusionmentioning

confidence: 97%

Opportunities for silicon at mmWave and Terahertz frequencies

Pfeiffer

Öjefors

Lisauskas

et al. 2008

2008 IEEE Bipolar/BiCMOS Circuits and Technology Meeting

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“…Thanks to the rapid progress of CMOS technology, 0.13 lm CMOS process has become relatively costeffective in realizing 60-GHz-band receiver front-end circuits or even most parts of a whole transceiver [1]. Compared with the BiCMOS process, CMOS process has the advantages of lower cost, higher integration, and comparable performances [1,2]. Figure 1 shows a typical block diagram of a frequency synthesizer used for a 60-GHz-band transceiver [3][4][5].…”

Section: Introductionmentioning

confidence: 99%

“…So far, there are many experiments and reports on designing dual-band and tri-band filters. At first, the dual-band response is realized by cascading a bandpass filter with a bandstop filter [1] or using two circuits that were individually designed for each band [2]. Unfortunately, these approaches need extra impedance matching networks and result in large circuit size.…”

Section: Introductionmentioning

confidence: 99%

Excellent sensitivity 64.8‐GHz CMOS injection‐locked frequency divider with 10.2‐GHz locking range

Chen

Lin

et al. 2010

Micro & Optical Tech Letters

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A low-power and wide-locking-range 64.8-GHz injectionlocked frequency-divider (ILFD) using standard 0.13 lm CMOS technology is reported. To enhance the locking range, a shunt inductor was introduced in the source node of the cross-coupled transistor pair to maximize the equivalent load impedance of the tail transistor, i.e., to maximize the internal power, over the frequency band of interest. In addition, the inductors and capacitors of the LC-tank were implemented by low-Q micro-stripline inductors and high-Q varactors, respectively, to further improve the locking range of the ILFD. The result shows that a wide locking-range of 10.2 GHz (from 54.6 GHz to 64.8 GHz (17%)), covering the 57-64-GHz ultra-wideband (UWB) set aside by FCC of USA, was achieved. The ILFD can be operated at an input power of À60 dBm. To the authors' knowledge, this is the best input sensitivity ever reported for a 60-GHz-band CMOS divider. The power consumption of the ILFD was only 3.39 mW from a 1 V power supply. The chip area was only 0.9 Â 0.73 mm 2 excluding the test pads.

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“…In practical applications an LNA will be included at the input of the receiver. Unlike the single-ended LNA, the differential LNA is superior in terms of common-mode noise rejection (Sun, 2006). The degradation of the common-mode noise will be stronger for an impulse radio receiver since the analog front-end and the logic circuits share the same substrate.…”

Section: Mw 5gbps Cmos Receiver Designmentioning

confidence: 99%