A free-running, time-based readout method for particle detectors

Abstract

For the EndoTOFPET-US experiment, the TOFPET ASIC has been developed as a front-end chip to read out data from silicon photomultipliers (SiPM) [1]. It introduces a time of flight information into the measurement of a PET scanner and hence reduces radiation exposure of the patient [2]. The chip is designed to work with a high event rate up to 100 kHz and a time resolution of 50 ps LSB. Using two threshold levels, it can measure the leading edge of the event pulse precisely while successfully suppressing dark counts from the SiPM. This also enables a time over threshold determination, leading to a charge measurement of the signal's pulse.The same, time-based concept is chosen for the PASTA chip used in the PANDA experiment. This high-energy particle detector contains sub-systems for specific measurement goals. The innermost of these is the Micro Vertex Detector, a silicon-based tracking system. The PASTA chip's approach is much like the TOFPET ASIC with some differences. The most significant ones are a changed amplifying part for different input signals as well as protection for radiation effects of the high-radiation environment. Apart from that, the simple and general concept combined with a small area and low power consumption support the choice for using this approach.

Study of SEU effects in circuits developed in 110 nm CMOS technology

“…The chip hosts the bias cells of the analog stages and a calibration circuit, generating a test pulse with configurable amplitude. The analog front-end implements a specific design to cope with micro-strips sensors, radiation hardness protection techniques have been implemented as well [4].…”

“…It was developed by a JLU Gieβ en, FZ Jülich and INFN Torino collaboration. Since it implements the two typical methods [4] to mitigate the Single Event Upset (SEU) effects, Triple Modular Redundancy (TMR) technique and Hamming Encoding, it is a good candidate to investigate the behaviour of that commercial 110 nm technology in a radiation environment. These techniques have been already studied in previous projects, developed at INFN-Torino, based on a 130 nm CMOS technology from a different manufacturer and a slightly higher tolerance to the radiation of TMR with D type flip flop circuits was observed…”

First results of the front-end ASIC for the strip detector of the PANDA MVD

“…With respect to TOFPET, the design of PASTA required a complete redesign of the analog front-end stage to cope with the different specifications of the sensors, as well as the implementation of radiation hardness protection techniques [8].…”

The readout chain for the P̄ANDA MVD strip detector

“…One of the most important changes was the implementation of techniques to mitigate Single Event Upset (SEU). Therefore, triple modular redundancy and Hamming encoding was introduced [7]. The submission of a first prototype in commercial 110nm CMOS technology is foreseen for the beginning of 2015.…”