A framework for analysis of high-order sigma-delta modulators

Steiner, Philip; Yang, Wei

doi:10.1109/82.559364

Cited by 33 publications

(24 citation statements)

References 12 publications

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“…This represents a typical modulator design, which is often used in practical designs [14]. The state-space description of other classes of modulators closely resembles the description that follows below [15]. One can easily read that, for the SDM depicted there (1) where is the output bit at clock cycle , is the quantizer input signal, and are the integrator outputs, called state variables.…”

Section: A State-space Descriptionmentioning

confidence: 99%

Description of limit cycles in sigma-delta modulators

Reefman

Reiss

Janssen

et al. 2005

IEEE Trans. Circuits Syst. I

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Abstract-A mathematical framework, based on state-space modeling, for the description of limit cycles (LCs) of 1-bit sigma-delta modulators (SDMs) is presented. It is proved that periodicity in bit output pattern of the SDM implies a periodic orbit in state-space variables. While the state-space description is generally applicable for periodic inputs, the focus is on dc inputs, since this represents the most relevant practical condition. An outcome of the analysis is that, in general, for an th-order SDM, at least 1 initial conditions need to be fixed in order to have LC behavior. Expressions for the minimum disturbance of the input or initial conditions that is needed to break up a LC are also presented. Special focus is given to the case where the disturbance takes the form of "dithering the quantizer", and it is shown that this form of dither is a suboptimal approach to remove LCs. The stability of LCs is determined, and it is demonstrated that a resonator section, as often employed to increase the dynamic range of an SDM, has an adverse effect on LC behavior in that it stabilizes LCs. Furthermore, the experimental observation that high order SDMs are less susceptible to LCs is underpinned. Finally, some examples are provided which illustrate the theoretical results.

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Section: A State-space Descriptionmentioning

confidence: 99%

Description of limit cycles in sigma-delta modulators

Reefman

Reiss

Janssen

et al. 2005

IEEE Trans. Circuits Syst. I

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“…These cases are studied in (Steiner and Yang, 1997) and can be analyzed on a system-by-system basis. Generally, not all the state variables can be decoupled for the Δ∑ modulator structure with resonators.…”

Section: Problem Formulationmentioning

confidence: 99%

1-Bit processing based model predictive control for fractionated satellite missions

Bai

2014

Acta Astronautica

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In this thesis, a 1-bit processing based Model Predictive Control (OBMPC) structure is proposed for a fractionated satellite attitude control mission. Despite the appealing advantages of the MPC algorithm towards constrained MIMO control applications, implementing the MPC algorithm onboard a small satellite is certainly challenging due to the limited onboard resources. The proposed design is based on the 1-bit processing concept, which takes advantage of the affine relation between the 1-bit state feedback and multi-bit parameters to implement a multiplier free MPC controller.As multipliers are the major power consumer in online optimization, the OBMPC structure is proven to be more efficient in comparison to the conventional MPC implementation in term of power and circuit complexity. The system is in digital control nature, affected by quantization noise introduced by Δ∑ modulators. The stability issues and practical design criteria are also discussed in this work.Some other aspects are considered in this work to complete the control system. Firstly, the implementation of the OBMPC system relies on the 1-bit state feedbacks. Hence, 1-bit sensing components are needed to implement the OBMPC system. While the ∆∑ modulator based Microelectromechanical systems (MEMS) gyroscope is considered in this work, it is possible to implement this concept into other sensing components.Secondly, as the proposed attitude mission is based on the wireless inter-satellite link (ISL), a state estimator is required. However, conventional state estimators will once again introduce multi-bit signals, and compromise the simple, direct implementation of the OBMPC controller. Therefore, the 1-bit state estimator is also designed in this work to satisfy the requirements of the proposed fractionated attitude control mission.The simulation for the OBMPC is based on a 2U CubeSat model in a fractionated satellite structure, in which the payload and actuators are separated from the controller and controlled via the ISL. Matlab simulations and FPGA implementation based performance analysis shows that the OBMPC is feasible for fractionated satellite missions and is advantageous over the conventional MPC controllers. V VI

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“…It should be stressed that the original approach in [10] is extended in [12] for complex pairs of poles. In this case, the block diagram is the same as in Figure 2, but for every complex conjugated pair of poles λ i , λ i+1 the corresponding coefficients b i , b i+1 are also complex conjugated.…”

Section: Parallel Decomposition Of High Ordermentioning

confidence: 99%

“…Especially we focus our attention on constant input signals. The method is based on the decomposition of the general N-th order modulator presented in [10], [11], [12]. Using this presentation the modulator could be considered as made up of N first order modulators (generally complex modulators), which interact only through the quantizer function.…”

Section: Introductionmentioning

confidence: 99%

A method for searching the limit cycles of high order sigma-delta modulators

Mladenov

2009

2009 European Conference on Circuit Theory and Design

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Link to publication Citation for published version (APA):Mladenov, V. M. (2009). A method for searching the limit cycles of high order Sigma-Delta modulators. In Proceedings of the 19th European Conference on Circuit Theory and Design, ECCTD 2009, August 23-27, 2009 Antalya, Turkey, (pp. 543-546 General rightsCopyright and moral rights for the publications made accessible in the public portal are retained by the authors and/or other copyright owners and it is a condition of accessing publications that users recognise and abide by the legal requirements associated with these rights.• Users may download and print one copy of any publication from the public portal for the purpose of private study or research.• You may not further distribute the material or use it for any profit-making activity or commercial gain • You may freely distribute the URL identifying the publication in the public portal ? Take down policyIf you believe that this document breaches copyright please contact us providing details, and we will remove access to the work immediately and investigate your claim.

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A framework for analysis of high-order sigma-delta modulators

Cited by 33 publications

References 12 publications

Description of limit cycles in sigma-delta modulators

Description of limit cycles in sigma-delta modulators

1-Bit processing based model predictive control for fractionated satellite missions

A method for searching the limit cycles of high order sigma-delta modulators

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