A Four-Way Series Doherty Digital Polar Transmitter at mm-Wave Frequencies

Abstract

This paper presents an efficient digital polar transmitter (DPTX) at mm-wave frequencies that exploits a novel N-way series Doherty combiner (SDC) to enhance its drain and system efficiency at deep power back-off (PBO). The proposed N-way SDC is scalable and can be implemented elegantly using N transformers and N-1 shunt capacitors. As a proof of concept, a 4-way Doherty DPTX is realized with the proposed SDC in which four identical but independent digital phase modulators deliver a phase-modulated constant envelope signal to their corresponding digital power amplifiers to perform the required amplitude modulation. Fabricated in a 40-nm CMOS process, the proposed DPTX occupies a core area of 1.1 mm 2 and exhibits 18.7 dBm saturated output power and <-40 dBc LO feedthrough. It demonstrates a drain efficiency of 33%/36%/22% at 0/4.5/11.5 dB PBO at 29.5 GHz carrier frequency. While transmitting a 300 MHz 64-QAM OFDM signal with a peakto-average power ratio of -10.7 dB, the DPTX achieves 18%/8% average drain/system efficiency, -27.6 dB error vector magnitude, and -27.5 dBc adjacent channel leakage ratio. To the best of the authors' knowledge, this work is the first reported mm-wave Doherty transmitter that includes the entire chain all the way from the binary data stream up to the modulated mm-wave output signal.Index Terms-Series Doherty combiner, Digital polar transmitter, Doherty design guide, Digital power amplifier (DPA), Digital phase modulator (DPM), millimeter-wave transmitter, power amplifier (PA).

A Millimeter-Wave CMOS Series-Doherty Power Amplifier With Post-Silicon Inter-Stage Passive Validation

“…To alleviate the efficiency issue, outphasing TXs offer high average efficiency, but they demand significant baseband overhead to generate outphasing signals and intensive digital predistortion (DPD) [15]- [19]. In contrast, load-modulated balanced amplifiers (LMBAs) [20], [21] and Doherty PAs (DPAs) [22]- [38] are "RF-in-RF-out" power back-off (PBO) efficiency enhancement front-end solutions that support wideband modulations. The LMBA structure con-sists of two main PAs and an auxiliary PA combined through a quadrature-hybrid coupler.…”

A Broadband Three-Way Series Doherty Power Amplifier with Deep Power Back-Off Efficiency Enhancement for 5G Application

“…The Doherty power amplifier (DPA) is the most widely used architecture for improving the OBO efficiency of PAs due to its intrinsic linearity and low baseband overhead [8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23]. A DPA typically comprises a Main PA and an Auxiliary PA, with its OBO efficiency enhanced through active load modulation between these two sub-PAs.…”

“…Second, the elimination of the λ/4 TL after the Main PA enhances both the bandwidth and the linearity [8]. Nonetheless, while the series DPA topology has been successfully implemented in CMOS processes [8][9][10][11][12][13][14], its application in printed circuit board (PCB) or monolithic microwave integrated circuit (MMIC) processes is still rarely reported. This is primarily attributed to the constraints of these processes, which generally contain only two or three metal layers (including the ground layer), posing significant challenges in the fabrication of transformers with high coupling factors.…”

Millimeter-Wave Quadrature Mixed-Mode Transmitter With Distributed Parasitic Canceling and LO Leakage Self-Suppression

“…Meanwhile, the routing parasitics also deteriorate P out and efficiency. Recently, the millimeter-wave digital TXs are proposed with improved P out and efficiency [46], [47], [48]. The currentmode millimeter-wave quadrature digital TX using synthesized impedance variation compensation is proposed for 5G wireless and backhaul communication [46].…”

“…The edge-combining technique is introduced to allow the switching transistors to operate properly at millimeter-wave with high efficiency. Besides, a four-way series Doherty digital polar TX is introduced [48]. The current-mode unit cell consisting of a differential pair and a switchable tail transistor is adopted to implement the power DAC with high efficiency.…”