1999
DOI: 10.1109/30.754411
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A flexible heterogeneous video processor system for television applications

Abstract: -A new video processing architecture for high-end TV applications is presented, featuring a flexible heterogeneous multi-processor architecture, executing video tasks in parallel and independently. The signal flow graph and the processors are programmable, enabling an optimal picture quality for different TV display modes. The concept is verified by an experimental chip design. The architecture allows several video streams to be processed and displayed in parallel and in a programmable way, with an individual … Show more

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Cited by 16 publications
(3 citation statements)
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“…After color space conversion (matrix) of the enhanced result, the graphics which have been build up in the memory by the microcontroller, are blended with the video. For more details about applications and the quality of the individual video processors see [5]. Table 1 presents an overview of all memory accesses, including the required memory capacity and the number of inputs and outputs to and from memory.…”
Section: Applicationsmentioning
confidence: 99%
“…After color space conversion (matrix) of the enhanced result, the graphics which have been build up in the memory by the microcontroller, are blended with the video. For more details about applications and the quality of the individual video processors see [5]. Table 1 presents an overview of all memory accesses, including the required memory capacity and the number of inputs and outputs to and from memory.…”
Section: Applicationsmentioning
confidence: 99%
“…In [3], the necessity of a modular parallel processing architecture for TV applications is motivated and a preliminary application is discussed. In-depth details of the architecture are presented in a corresponding paper [8].…”
Section: Architecturementioning
confidence: 99%
“…For this purpose, some of the graphics can be up-converted t o a higher resolution, if required. For more details about applications and the quality of the individual coprocessors, the reader is referred to [3].…”
Section: Application Example IImentioning
confidence: 99%