A Family of Logical Fault Models for Reversible Circuits

Polian, Ilia; Fiehn, T.; Becker, Bernd; Hayes, John P.

doi:10.1109/ats.2005.9

Cited by 111 publications

(76 citation statements)

References 7 publications

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“…Polian et al promoted the use of a gate fault model for QC over the stuck-at model [5]. They derived a family of logical fault models for reversible circuits composed of k-CNOT (k-input controlled-NOT) gates.…”

Section: Fault Models For Quantum Logicmentioning

confidence: 99%

Advances in Quantum Computing Fault Tolerance and Testing

García

Roach

2007

10th IEEE High Assurance Systems Engineering Symposium (HASE'07)

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Section: Fault Models For Quantum Logicmentioning

confidence: 99%

Advances in Quantum Computing Fault Tolerance and Testing

García

Roach

2007

10th IEEE High Assurance Systems Engineering Symposium (HASE'07)

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“…In recent days, research in the area of reversible logic has been intensified and accelerated by the promising results. As a result, besides verification [11][12][13], testing [14][15][16], simulation [17,18], optimization [19], and debugging [20] and synthesis of reversible circuits [7], approaches exploiting permutations and truth tables [21] are main research areas. Minimizing the number of garbage outputs and number of gates are the major concerns in reversible logic circuits and it is observed that proposed 4 input ALG gate achieves minimum garbage output and leading to high speed and low power reversible circuits.…”

Section: Related Workmentioning

confidence: 99%

Reversible Arithmetic Logic Gate (ALG) for Quantum Computation

Arun

Saravanan²

2013

IJIES

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At present, Boolean algebra based computations by the use of silicon based semiconductor technology are irreversible in nature. This is due to the mismatch of number of inputs and outputs. Reversible logic circuit maps unique input to the output and ensure one to one mapping and basis for emerging applications like low-power design, quantum computation, optical computing, bioinformatics and nanotechnologies. In computing paradigm, Arithmetic Logic Unit (ALU) is one of the computing intensive building blocks of the computer that performs arithmetic and logical operations. This work understands and nurtures the necessity of reversible ALU for future revolutionary computing technologies. In this paper, a 4x4 reversible gate which alone performs arithmetic and logic operations is proposed and compared with other reversible gates like TSG, HNG and MKG, in terms of quantum cost, I/O lines and Taffoli gates. The results of different synthesis methods of 4x4 ALG using Revkit tool are studied. Proposed gate performs better than existing methods and ensures maximum logical operations like full adder, full subtractor and all logical operations with less hardware cost where other existing gates are not viable.

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“…As a result, reversible logic became an intensely studied research area leading to first approaches for synthesis [8]- [13], optimization [14], [15], verification [16]- [18], testing [19]- [21], and even debugging [22]. But so far only simple circuits have been considered since most of the respective synthesis approaches still rely on Boolean function descriptions like permutations [8], truth tables [9], binary decision diagrams [13], positive-polarity Reed-Muller expansion [10], or Reed-Muller spectra [11].…”

Section: Introductionmentioning

confidence: 99%

SyReC: a programming language for synthesis of reversible circuits

Wille¹,

Offermann²,

Drechsler³

2010

2010 Forum on Specification &Amp; Design Languages (FDL 2010)

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Abstract-Reversible logic serves as a basis for emerging technologies like quantum computing and additionally has applications in low-power design. In particular, since traditional technologies like CMOS are going to reach their limits in the near future, reversible logic has been established as a promising alternative. Thus, in the last years this area started to become intensely studied by researchers. In particular, how to efficiently synthesize complex reversible circuits is an important question. So far, only synthesis approaches are available that rely on Boolean function representations, like e.g. truth tables or decision diagrams.In this paper, we propose the programming language SyReC that allows to specify and afterwards to automatically synthesize reversible circuits. Using an existing programming language for reversible software design as basis, we introduce new concepts, operations, and restrictions allowing the specification of reversible hardware. Furthermore, a hierarchical approach is presented that automatically transforms the respective statements and operations of the new programming language into a reversible circuit. Experiments show that with the proposed method, complex circuits can be easily specified and synthesized while with previous approaches this often is not possible due to the limits caused by truth tables or decision diagrams.

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A Family of Logical Fault Models for Reversible Circuits

Cited by 111 publications

References 7 publications

Advances in Quantum Computing Fault Tolerance and Testing

Advances in Quantum Computing Fault Tolerance and Testing

Reversible Arithmetic Logic Gate (ALG) for Quantum Computation

SyReC: a programming language for synthesis of reversible circuits

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