Proceedings of the 2005 Conference on Asia South Pacific Design Automation - ASP-DAC '05 2005
DOI: 10.1145/1120725.1120993
|View full text |Cite
|
Sign up to set email alerts
|

A dynamic reconfigurable RF circuit architecture

Abstract: This paper proposes a dynamic reconfigurable architecture for analog RF circuits. The architecture consists of RF circuits and a control circuit. The RF circuits can be reconfigured by bias voltages of transistors and variable passive components, and the RF circuit block can also be switched dynamically. The proposed architecture can realize the multi-band/mode RF circuit in single chip for the Software Defined Radio, which achieves considerable reduction of circuit area and power consumption. On the other han… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2

Citation Types

0
2
0

Year Published

2005
2005
2011
2011

Publication Types

Select...
4
3

Relationship

3
4

Authors

Journals

citations
Cited by 14 publications
(2 citation statements)
references
References 15 publications
0
2
0
Order By: Relevance
“…Several multistandard RF front ends have been proposed. Digital-assist architectures are suitable for Si CMOS chips [14,15]. As a common component for the multistandard RF front ends, this paper proposes a wideband frequency synthesizer covering 0.98 GHz to 6.6 GHz [20].…”
Section: Introductionmentioning
confidence: 99%
“…Several multistandard RF front ends have been proposed. Digital-assist architectures are suitable for Si CMOS chips [14,15]. As a common component for the multistandard RF front ends, this paper proposes a wideband frequency synthesizer covering 0.98 GHz to 6.6 GHz [20].…”
Section: Introductionmentioning
confidence: 99%
“…Several multi-standard RF front-ends have been proposed. As one of the multi-standard RF frontend, a reconfigurable RF circuit architecture have been proposed [2], which aims to realize dynamic reconfiguration for multi functions and self compensation of PVT with variable bias tuning and switches. Such the digital-assisted architec- tures are suitable for fragile CMOS circuits.…”
Section: Introductionmentioning
confidence: 99%