A dual-band 5.15-5.35-GHz, 2.4-2.5-GHz 0.18-/spl mu/m CMOS transceiver for 802.11a/b/g wireless LAN

Vavelidis, K.; Vassiliou, I.; Georgantas, T.; Yamanaka, Akifumi; Kavadias, S.; Kamoulakos, G.; Kapnistis, C.; Kokolakis, Y.; Kyranas, A.; Merakos, P.; Bouras, I.; Bouras, S.; Plevridis, S.; Haralabidis, N.

doi:10.1109/jssc.2004.829936

Cited by 55 publications

(23 citation statements)

References 5 publications

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“…10, which is above 28 dBc at the ±1.2-MHz offset frequency. Due to the low in-band integrated phase noise and the digital calibration that eliminates I/Q mismatch and baseband filter mismatch, transmitter EVM is dominated by nonlinearities (Behzad Razzavi (1997), , K. Vavelidis et al (2004)). As shown in Fig.…”

Section: Lc-vcomentioning

confidence: 99%

Realizing a CMOS RF Transceiver for Wireless Sensor Networks

Seo¹

2011

Wireless Sensor Networks

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Section: Lc-vcomentioning

confidence: 99%

Realizing a CMOS RF Transceiver for Wireless Sensor Networks

Seo¹

2011

Wireless Sensor Networks

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“…Devices of such type use baseband plus RF front-end to calibrate the gain and phase mismatch. For example, baseband signal processing techniques have been used to generate a test signal to the RF front-end [25,26,28]. Since the output of the RF front-end running this test signal will give information on the mismatch, the baseband can sense this output to determine a control code for the front-end circuits to compensate the mismatch.…”

Section: Introductionmentioning

confidence: 99%

A CMOS Quadrature LC Oscillator using Automatic Phase/Amplitude Calibration

Ghonoodi

Naimi

2011

Circuits Syst Signal Process

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In this paper, a novel LC quadrature oscillator (QO) is presented that can simply and automatically cancel the phase and amplitude errors raised by mismatches in LC tanks; the major source of phase and amplitude errors. The design is based on method of using unequal coupling factors in a parallel quadrature oscillator (P-QO). This method shows how we can cancel phase and amplitude errors simultaneously by choosing appropriate inversely proportional coupling factors. To cancel the errors, the proposed circuits first sense the phase error and increase or decrease the difference between the coupling factors accordingly. When tuning tail currents, the coupling factors can be simply adjusted. The entire system has a block diagram like a PLL. The dynamics of the proposed circuit is analyzed, and it is shown how the phase and amplitude error is canceled in response to an imposed LC tank mismatch. To evaluate the circuit, a QO has been designed to oscillate at 5 GHz with 1.8 V supply and 6.2 mA current consumption. The circuit has been simulated using TSMC 0.18 CMOS practical model where all the results confirm the analytical results.

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“…The low-cost requirement is more imperative in WLAN than in any other standards, and numerous CMOS solutions have been reported [1][2][3][4][5][6][7][8][9][10]. For low-cost CMOS integration, direct conversion to dc or low IF is common, but problems such as dc offset, I/Q mismatch, self-mixing, power amplifier pull, flicker noise, ect., limit their widespread applications.…”

Section: Introductionmentioning

confidence: 99%

“…The RF impedance matching is a difficult task since the matching impedance is usually 50 . In the literatures, many RF front-ends implemented the impedance matching off-chip [1,2] or bondwire inductance [3,5,7,8], but extra off-chip components would increase the cost and lower the stability of the systems while the bondwire inductance couldn't be accurately controlled. So the on-chip impedance matching is highly expected for the low cost transceivers.…”

Section: Introductionmentioning

confidence: 99%

A low voltage CMOS RF front-end for IEEE 802.11b WLAN transceiver

Chi

Shi

Wang

2006

Analog Integr Circ Sig Process

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A low voltage CMOS RF front-end for IEEE 802.11b WLAN transceiver is presented. The problems to implement the low voltage design and the on-chip input/output impedance matching are considered, and some improved circuits are presented to overcome the problems. Especially, a single-end input, differential output double balanced mixer with an on-chip bias loop is analyzed in detail to show its advantages over other mixers. The transceiver RF front-end has been implemented in 0.18 um CMOS process, the measured results show that the Rx front-end achieves 5.23 dB noise figure, 12.7 dB power gain (50 ohm load), −18 dBm input 1 dB compression point (ICP) and −7 dBm IIP3, and the Tx front-end could output + 2.1 dBm power into 50 ohm load with 23.8 dB power gain. The transceiver RF front-end draws 13.6 mA current from a supply voltage of 1.8 V in receive mode and 27.6 mA current in transmit mode. The transceiver RF front-end could satisfy the performance requirements of IEEE802.11b WLAN standard.

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A dual-band 5.15-5.35-GHz, 2.4-2.5-GHz 0.18-/spl mu/m CMOS transceiver for 802.11a/b/g wireless LAN

Cited by 55 publications

References 5 publications

Realizing a CMOS RF Transceiver for Wireless Sensor Networks

Realizing a CMOS RF Transceiver for Wireless Sensor Networks

A CMOS Quadrature LC Oscillator using Automatic Phase/Amplitude Calibration

A low voltage CMOS RF front-end for IEEE 802.11b WLAN transceiver

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