A DSP based SVC IP STB using open SVC decoder

Abstract

International audienceIn this paper, a implementation of a DSP-based IP set-top box (IP-STB) to decode CIF sequences compliant with the new Scalable Video Coding standard (14496-10 Amd 3) using Open SVC Decoder (OSD) is presented. The OSD software, designed for the PC environment, has been integrated into a previously developed IP-STB prototype. About 15 CIF frames per second can be decoded with the IP-STB

A DSP based H.264/SVCdecoder for a multimedia terminal

“…The modules having the highest computational load have been identified. The methodologies presented in [9][10] [11] have been applied to reduce the number of CPU cycles needed to decode an H.264/SVC bit-stream. These methodologies improve the decoder performance taking advantage of the SIMD (Simple Instruction Multiple Data) architecture and using explicit DMA transfers to move data between internal and external memory.…”

“…Up to now, the available SVC decoder implementations are restricted to the PC domain [7] [8]. In this work, the Open SVC decoder [8] has been ported to the DSP environment and the methodologies proposed in [9][10] [11] to reduce its decoding time have been applied. The real-time performance has been reached for CIF sequences.…”

H.264/SVC decoder performance comparison for DSP-based consumer electronic applications

“…The decoder has been ported to the DSP using the methodology presented in [11]. In the DSP-version, the decoder has been encapsulated into a DSP-BIOS task.…”

Multi-DSP implementation of a H.264/SVC decoder

“…Currently, the H.264/SVC decoder implementations are restricted to the PC domain [4] [5]. In our previous work [6], the Open SVC decoder [5] was ported to the DSP environment and the methodologies proposed in [7][8] [9] to reduce its decoding time were applied.…”