A DPA-resistant crypto engine for UHF RFID tag

Zhu, Linghao; Wu, Cheng; Wu, Linyin; Wang, Junyu; Min, Hao

doi:10.1504/ijes.2015.069986

Cited by 2 publications

(2 citation statements)

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“…Encapsulating different modules with the component technology, making the channel leak model with different characteristics and analysis method can flexibility to join the simulation system, and makes the module of updates, amend, and maintenance become more convenient. And compared to PINPAS power simulation analysis, has strong scalability and configurability [5][6][7][8][9].…”

Section: The General Framework For Simulation Platformmentioning

confidence: 99%

Side Channel Attacks Simulation Environment Design and Implementation for Crypto-Chip

Ma¹,

Yang²,

Yao³

et al. 2017

Proceedings of the 7th International Conference on Education, Management, Information and Mechanical Engineering (EMIM 2017)

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Side channel attack(SCA) is a powerful physical safety analysis method, the SCA security assessment for crypto-chip are generally in production, but with time-consuming, safety evaluation error-prone and costly wait for blemish. In order to improve the efficiency, it is necessary at design time to do SCA, but the safety evaluation needs the corresponding side channel simulation tool support. This paper presents the design scheme of SCA simulation environment. The scheme adopts the software and hardware of collaborative design thoughts, and though separating the leak simulation mechanism and safety analysis strategies, SCA simulation environment is established with component technology, can do SCA simulation analysis at design time of the crypto-chip. Compared with the existing PINPAS simulation environment, the environment has flexible and efficient characteristics.

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Section: The General Framework For Simulation Platformmentioning

confidence: 99%

Side Channel Attacks Simulation Environment Design and Implementation for Crypto-Chip

Ma¹,

Yang²,

Yao³

et al. 2017

Proceedings of the 7th International Conference on Education, Management, Information and Mechanical Engineering (EMIM 2017)

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“…Except cache attack, embedded systems like WSNs face the problem of how to realise high performance AES on resource constricted platform (Zhu et al, 2015), especially in TDMA-based WSNs (Wang et al, 2013) that require real-time requirement. This paper propose a novel 1-T LUT implementation of AES.…”

Section: Introductionmentioning

confidence: 99%

Access-driven cache attack resistant and fast AES implementation

Wan

Luo

et al. 2018

IJES

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Contents:IJES is a refereed international journal providing an international forum to report, discuss and exchange experimental or theoretical results, novel designs, work-in-progress, experience, case studies, and trend-setting ideas. Papers should be of a quality that represents the latest advances in embedded systems in time-to-market, cost, code size, weight, testability, power, real-time behaviour, and stimulating future trends.

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A DPA-resistant crypto engine for UHF RFID tag

Cited by 2 publications

References 0 publications

Side Channel Attacks Simulation Environment Design and Implementation for Crypto-Chip

Side Channel Attacks Simulation Environment Design and Implementation for Crypto-Chip

Access-driven cache attack resistant and fast AES implementation

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