A design methodology using flip-flops controlled by PVT variation detection

Giron-Allende, Alexandro; Avendano, V.; Martinez-Guerrero, E.

doi:10.1109/lascas.2015.7250420

Cited by 2 publications

(3 citation statements)

References 6 publications

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“…The amplifier's gain can be compensated by tracking the PVT variations by an auxiliary single-pole amplifier [11]. Alternatively, the circuit's operating environment can be directly detected by PVT detector to regulate the circuit [12][13][14][15]. In this design, adjusting the amplifier's reference voltage under various PVT situations can precisely control the output voltage by the regulation system.…”

Section: Introductionmentioning

confidence: 99%

A 5 V-to-32 V Input PVT-Robust Charge-Pump Circuit with Adjustable Output in a 0.18 μm BCD Process

Wang²,

2022

Electronics

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In this paper, a new closed-loop charge-pump circuit with adjustable output voltage and an on-chip compensation technique is proposed. The environmental temperature and process corner can be detected with an on-chip detection circuit and automatically feedback an adjusted reference voltage. With this, the magnitude of the charge-pump output voltage with Pulse-Width Modulation (PWM) can be compensated. The charge-pump circuit is designed and verified with a 180 nm Bipolar-CMOS-DMOS (BCD) process, and its output voltage at different process, voltage, and temperature (PVT) is controllable with low ripple. There are three selections for adjusting the output voltage: +5 V/+7 V/+10 V shifts, with the supply voltage ranging from 5 V to 32 V. It can remain tunable and stable at any shifts. The maximum deviation is ±0.265%, and the maximum load current can reach 30 mA. The ripple voltage is less than 0.3% (Δ Vripple/Vout) underthe maximum load. The Monte Carlo simulation results show that the worst case of the process sensitivity (σ/μ) is 0.1%. The charge-pump core area is 0.308 mm2, and the power consumption is 4.753 mW. The circuit can produce high-precision output and is suitable for high-side driving IC applications.

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Section: Introductionmentioning

confidence: 99%

A 5 V-to-32 V Input PVT-Robust Charge-Pump Circuit with Adjustable Output in a 0.18 μm BCD Process

Wang²,

2022

Electronics

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“…The main idea in the current proposal is to achieve the PVT detection considering the mixed variables impact reflected in the propagation delay. A PVT detector presented in [20] senses the change of the PVT conditions using a delay line or delay chain (Figure 1). This delay line uses a logic inverter chain and D flip-flops (FF1, FF2).…”

Section: Introductionmentioning

confidence: 99%

“…A PVT monitor of this type can be designed to detect different delay levels. A "Multi-level" PVT detector presented in [20] is shown in Figure 2. This monitor is using the same delay detector approach already explained, but using more flip-flops connected to different points of the delay line in order to detect different delay levels.…”

Section: Introductionmentioning

confidence: 99%

Delay Based Auto-Calibrated PVT Monitor System and Method

Giron¹,

Martínez²,

Avendano³

2020

CSSP

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In this paper, an auto-calibrated PVT (process, voltage, temperature) monitoring system based on delay chains and flip-flops is presented. The system and method are proposed to be used by IP's (Intellectual property) that require to monitor PVT conditions during its operation and depending on the detected changes be configurable or adaptive. The methodology is based on embedded PVT monitors that sense when the propagation delay variation in standard cells reaches a certain threshold. The system implementation is intended to be done since the RTL (register transfer level) design stage to avoid or reduce the full custom design effort. The PVT monitors are built using buffers from a technology design kit. The information of the PVT monitors is sent to a logic module that calibrates the monitors to choose the best monitoring option depending on the PVT corner, available clock, and standard cells delay. The system includes also a logic module that collects and sends the data inside or outside the chip, in parallel or serial modes. Characterization results of the PVT monitors are presented including different delay chains, and clock combinations trough different PVT corners. This system is intended to detect the change of the propagation delay in the cells due to the PVT conditions combined, and not to provide the stand-alone value of voltage, temperature, or process. Otherwise, one of the reasons for this proposal is to avoid the use of individual sensors.

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A design methodology using flip-flops controlled by PVT variation detection

Cited by 2 publications

References 6 publications

A 5 V-to-32 V Input PVT-Robust Charge-Pump Circuit with Adjustable Output in a 0.18 μm BCD Process

A 5 V-to-32 V Input PVT-Robust Charge-Pump Circuit with Adjustable Output in a 0.18 μm BCD Process

Delay Based Auto-Calibrated PVT Monitor System and Method

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