A Design for Selective Wet Etching of Si₃N₄/SiO₂in Phosphoric Acid Using a Single Wafer Processor

Abstract

Using single-wafer processors in the wet process implementation is a tendency for advanced semiconductor manufacturing due to the advantages of free contamination, flexible process control, and an improved particle removal efficiency without pattern damage. However, in the process of silicon nitride removal, not only the cost concern of phosphoric acidic consumption but also the process performances including etching rate, uniformity, and selectivity, are the barrier that makes this process hard to be switched to the single-wafer type from the bench type. Here we propose a novel design which introduces an upper-wafer heater plate to keep high temperatures of the phosphoric acid etchant in order to overcome the common issues of low etching rate, poor uniformity, and low selectivity in single-wafer processors suffering in the nitride strip process. In this work, the interactive influences of the operation variables, such as rotation speed, puddle time, and temperature, in the single wafer processor on the etching rate, uniformity, and selectivity are investigated to gain a deep understanding on this process. The etching selectivity obviously decreases from ca. 100 to 60 when the H 3 PO 4 temperature is increased from 144 to 154 • C while the introduction of a heater plate has been demonstrated to sharply promote the etching selectivity.

Luminescence from Si-Implanted SiO2-Si3N4 Nano Bi-Layers for Electrophotonic Integrated Si Light Sources

“…This was done using standard procedures for silicon nitride etching in the CMOS process of the IMB-CNM [16] facilities. This consists of a dip of the wafers in Sioetch to eliminate superficial oxides and oxinitrides, and a further, usually longer, hot H3PO4 bath which is highly selective of silicon nitride [17]. This process is repeated at least twice while supervising the thickness of films using a spectroscopic reflectivity analyzer Nanospec II in order to ensure, as much as possible, the presence of solely the 30 nm bottom oxide, adjusting the etching times of both solutions as needed.…”

Realization of Micropatterned, Narrow Line-Width Ni–Cu–Sn Front Contact Grid Pattern Using Maskless Direct-Write Lithography for Industrial Silicon Solar Cells

“…In general, SiN is etched using phosphoric acid (H 3 PO 4 ) solution at 160 °C . Yet, the phosphoric acid etching procedure is not suitable for photoresist-coated wafers.…”

Selective Etching of Silicon Nitride Over Silicon Oxide using ClF3/H2 Remote Plasma

“…Therefore, the etching of SiN x layers uniformly and ultra-high selectively to SiO y layers in the SiN x /SiO y stack is becoming more challenging process. Until now, the selective etching of SiN x in SiN x /SiO y stacks is achieved by wet etching using a hot phosphoric acid (H 3 PO 4 ) [3][4][5][6]. In case of the wet etching, however, the penetration of an etch solution into holes is getting more challenging as the thickness of the SiN x /SiO y layer is decreased and the remaining SiO y layers can be collapsed due to the surface tension.…”