A DC-DC converter-based infinite level inverter as DSTATCOM

Abstract

Summary In this paper, a three‐phase, infinite level voltage source inverter (ILI) topology‐based DSTATCOM is put forth. The number of voltage levels of an ILI depends on the carrier frequency used. Its reduced harmonic content, high DC link utilization, and reduced THD outweigh other inverter topologies and switching techniques. In the proposed technique, a single high frequency switch alone is needed. The instantaneous reactive power theory is used for the compensation. The aim of this paper is to mitigate harmonics by a new circuit topology for inverter feeding current at the point of coupling which requires lesser dc voltage when compared with conventional bridge type inverter which requires more than 1.5 times the rms voltage of supply voltage as the dc link voltage. The converter models are implemented in the MATLAB/SIMULINK. The power quality performance of the ILI‐based DSTATCOM is analyzed, and its hardware model is developed.

New family of expandable step‐up/‐down DC‐DC converters with increased voltage gain and decreased voltage stress on capacitors

“…Initially, it is aimed to achieve 139.3 V at the output when the voltage source is 25 V. This gives the voltage conversion ratio equal to 5.57. For generating this voltage gain by the proposed topology for n = 3, duty cycle should be 65% according to Equation (6). At the following, by using the equations presented in Section 2.1, these converter components are calculated.…”

“…By using Equation (27) and performing same procedure of Equations (4) to (6), the real-state output voltage of the converter can be described as follows:…”

“…These days, DC‐DC converters play a big role in diverse industrial applications . Up to now, various DC‐DC converters have been introduced . With introduction of converters as Zeta converter, Cuk converter, and SEPIC converter, high power applications were made possible because of their capability of providing high voltage gains .…”

“…[1][2][3] Up to now, various DC-DC converters have been introduced. [4][5][6] With introduction of converters as Zeta converter, Cuk converter, and SEPIC converter, high Abbreviations: SC, Switched capacitor; ESR, equivalent series resistance Symbols: C n , nth switched capacitor; C o , Filtering capacitor (output capacitor); D, Duty-cycle; D n , nth diode; f s , Switching frequency; G, ideal-state voltage gain (ideal-state voltage conversion ratio); G (real) , real-state voltage gain; I Co , Current across the filtering capacitor; I Cn , Current across the switched capacitors; I L1 , Current across the first inductor (L 1 ); I L2 , Current across the second inductor (L 2 ); I O , average output current; i L1 − min , minimum current of the first inductor; i L1 − max , maximum current of the first inductor; i L2 − min , minimum current of the second inductor; i L2 − max , maximum current of the second inductor; Δi L1 , First inductor's current ripple; Δi L2 , second inductor's current ripple; L 1 , First inductor; L 2 , Second inductor; M, ratio of voltage stress to output voltage; n, number of switched-capacitors; η, Efficiency of converter; R 1 , equivalent series resistance of the first inductor; R 2 , equivalent series resistance of the second inductor; S 1 , switch S 1 ; T n , nth T switch; T, One full cycle; V i , Ideal voltage source; V in , Input voltage; V O , Output voltage; V O(real) , Real-state output voltage; V GT , switching pulse for the T switches; V GS , switching pulse for the switch S; V Co , Voltage across the filtering capacitor; ΔV Co , Filtering capacitor's voltage ripple; V Cn , voltage across the nth switched capacitors; V Cn(real) , Real-state voltage across the nth switched capacitors; V Cn − max , maximum voltage of switched capacitors; V Cn − min , minimum voltage of switched capacitors; ΔV Cn , switched capacitors' voltage ripple; V L1 , Voltage across the first inductor; V L2 , voltage across the second inductor; V Dn , Voltage drop on nth diode; V S , Voltage drop on the switch S 1 ; V Tn , Voltage drop on nth T switch; V R1 , voltage drop on ESR of the first inductor; V R2 , voltage drop on ESR of the second inductor power applications were made possible because of their capability of providing high voltage gains. 4 However, there are some challenges for generating very high voltage gains by using these converters.…”

Improving power quality and load profile using PV‐Battery‐SAPF system with metaheuristic tuning and its HIL validation

“…PV‐DSTACTCOM using adaptive techniques have been implemented to improve the power quality and to decrease the generation through traditional sources . In Renukadevi et al, an infinite‐level VSI, which acts as a DSTATCOM, has been applied to reduce the THD. A PV‐UPQC has been proposed in Patel et al having various advantages like protecting critical loads from grid side disruption, enhancing power quality, and increasing the fault ride‐through capacity of the converter during transients.…”