A Critical Review of Lithography Methodologies and Impacts of Topography on 2.5-D/3-D Interposers

Liu, Fuhan; Nimbalkar, Pratik; Aslani-Amoli, Nahid; Kathaperumal, Mohanalingam; Tummala, Rao; Swaminathan, Madhavan

doi:10.1109/tcpmt.2023.3265568

Cited by 9 publications

(1 citation statement)

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“…Panel substrates also face dimensional abnormalities with respect to warpage and planarity and surface roughness, thus limiting the scaling. These surface topography deformations adversely affect the formation of fine features while patterning and worsen with multiple RDLs [12]. BEOL RDLs use dual-damascene processing to achieve finer RDL dimensions below 1 µm up to 0.1 µm.…”

Section: Fabrication and Processingmentioning

confidence: 99%

A Review of Polymer Dielectrics for Redistribution Layers in Interposers and Package Substrates

Nimbalkar,

Bhaskar,

Kathaperumal

et al. 2023

Polymers

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The ever-increasing demand for faster computing has led us to an era of heterogeneous integration, where interposers and package substrates have become essential components for further performance scaling. High-bandwidth connections are needed for faster communication between logic and memory dies. There are several limitations to current generation technologies, and dielectric buildup layers are a key part of addressing those issues. Although there are several polymer dielectrics available commercially, there are numerous challenges associated with incorporating them into interposers or package substrates. This article reviewed the properties of polymer dielectric materials currently available, their properties, and the challenges associated with their fabrication, electrical performance, mechanical reliability, and electrical reliability. The current state-of-the-art is discussed, and guidelines are provided for polymer dielectrics for the next-generation interposers.

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Section: Fabrication and Processingmentioning

confidence: 99%