A Cost- Effective Design of Reversible Programmable Logic Array

Singla, Pradeep; Malik, Naveen Kr.

doi:10.5120/5619-7911

Cited by 9 publications

(11 citation statements)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…There are PMOS and NMOS transistors in the CMOS (Complementary metal oxide semiconductor) design of the circuits as pull-up and pull-down and both the transistors contributing equally in the circuit operation [5] & the major cause of power dissipation in the digital circuits are following [5][6] [7][10]:…”

Section: Overview Of Power Gatingmentioning

confidence: 99%

Power Gating Structure for Reversible Programmable Logic Array

Singla¹

2015

ECIJ

Self Cite

View full text Add to dashboard Cite

Throughout the world, the numbers of researchers or hardware designer struggle for the reducing of power dissipation in low power VLSI systems. This paper presented an idea of using the power gating structure for reducing the sub threshold leakage in the reversible system. This concept presented in the paper is entirely new and presented in the literature of reversible logics. By using the reversible logics for the digital systems, the energy can be saved up to the gate level implementation. But at the physical level designing of the reversible logics by the modern CMOS technology the heat or energy is dissipated due the sub-threshold leakage at the time of inactivity or standby mode. The Reversible Programming logic array (RPLA) is one of the important parts of the low power industrial applications and in this paper the physical design of the RPLA is presented by using the sleep transistor and the results is shown with the help of TINA-PRO software. The results for the proposed design is also compare with the CMOS design and shown that of 40.8% of energy saving. The Transient response is also produces in the paper for the switching activity and showing that the proposed design is much better that the modern CMOS design of the RPLA.

show abstract

Section: Overview Of Power Gatingmentioning

confidence: 99%

Power Gating Structure for Reversible Programmable Logic Array

Singla¹

2015

ECIJ

Self Cite

View full text Add to dashboard Cite

show abstract

“…This rapid growth in the electronic industries also forces to designer to struggle for the designing of the efficient low power digital systems because the power loss and the energy loss is one of the limiting factor in the digital systems [10]. The logic design and the switches are the two main contributor of energy or power loss in the digital systems [4][5] [7] [9]. Even if Rolf Landauer in 1961 predicted that the irreversible logical computation device designed by the conventional approach having an entropy gain is S= K ln W. where W=2N, the number of states [1].…”

Section: Introductionmentioning

confidence: 99%

“…So, by this we get the expression for the energy or heat dissipation i.e. equal to the KT ln 2[1] [4][5][6][7][8][9][10][11]. Where K is the Boltzmann's constant equal to 1.3806505 × 10 -23 m 2 kg 2 k -1 (J/K) and T is the temp.…”

Section: Introductionmentioning

confidence: 99%

“…Furthermore, the co-founder of Intel (Gordon Moore) stated that the processing power will double every 18 months, will stop functioning in the year 2010-2020 called Moore's Law [4]. So, resultantly a new alternative approach of designing the digital system has been arose with the motto of reducing energy dissipation and subsequently reducing the entropy increase called Reversible Logic design.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Reversible Squaring Circuit for Low Power Digital Signal Processing

Singla¹,

Gautam²

2014

JESTR

Self Cite

View full text Add to dashboard Cite

With the high demand of low power digital systems, energy dissipation in the digital system is one of the limiting factors. Reversible logic is one of the alternate to reduce heat/energy dissipation in the digital circuits and have a very significant importance in bioinformatics, optical information processing, CMOS design etc. In this paper the authors propose the design of new 2-bit binary Squaring circuit used in most of the digital signal processing hardware using Feynman & MUX gate. The proposed squaring circuit having less garbage outputs, constant inputs, Quantum cost and Total logical calculation i.e. less delay as compared to the traditional method of squaring operation by reversible multiplier. The simulating results and quantized results are also shown in the paper which shows the greatest improvement in the design against the previous methodology.

show abstract

“…Reversible circuit do not lose information. A circuit will be reversible if input vector can be specifically retrieved from output vectors and here is one to one correspondence between input and output [3]. Reversible logic gates have same number of input and outputs, since in reversible circuits no bit loss is there hence ideally in reversible circuits no power dissipation occurs.…”

Section: Introductionmentioning

confidence: 99%

Design and Realization of 2:4 Decoder using Reversible Logic Gates

Sindhwad¹

2017

IJARCSSE

View full text Add to dashboard Cite

Abstract-A Decoder circuit converts a binary integer value to an associated pattern of output bits. They are used in various applications like data de-multiplexing, seven segment display, and memory address decoding. Day by day as the technology is advancing systems are becoming more compact. Power dissipation plays a critical role in design of low power circuit. Reversible logic has become the most promising technology in designing digital circuits. The research on reversibility has shown greater impact to have many applications in emerging technologies such as Quantum Computing, QCA, Nanotechnology and Low power VLSI. In this paper we have proposed designs of 2:4 decoder using reversible logic gates. The gate simulations of the proposed decoder are shown using QUARTUS II 9.1 Modelsim, which proved the functional correctness of the proposed circuits.

show abstract

A Cost- Effective Design of Reversible Programmable Logic Array

Cited by 9 publications

References 12 publications

Power Gating Structure for Reversible Programmable Logic Array

Power Gating Structure for Reversible Programmable Logic Array

Reversible Squaring Circuit for Low Power Digital Signal Processing

Design and Realization of 2:4 Decoder using Reversible Logic Gates

Contact Info

Product

Resources

About