Abstract-A Decoder circuit converts a binary integer value to an associated pattern of output bits. They are used in various applications like data de-multiplexing, seven segment display, and memory address decoding. Day by day as the technology is advancing systems are becoming more compact. Power dissipation plays a critical role in design of low power circuit. Reversible logic has become the most promising technology in designing digital circuits. The research on reversibility has shown greater impact to have many applications in emerging technologies such as Quantum Computing, QCA, Nanotechnology and Low power VLSI. In this paper we have proposed designs of 2:4 decoder using reversible logic gates. The gate simulations of the proposed decoder are shown using QUARTUS II 9.1 Modelsim, which proved the functional correctness of the proposed circuits.
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