A copper ReRAM cell for Storage Class Memory applications

Abstract

Hybrid memory systems that incorporate Storage Class Memory (SCM) as non-volatile cache or DRAM data backup are expected to bolster system efficiency and cost because SCM promises higher density than DRAM cache and higher speed than the storage I/F. This paper demonstrates a Cu-based resistive random access memory (ReRAM) cell that meets the SCM performance specifications for a 16Gb ReRAM with 200MB/s write and 1GB/s read [1]. Cell CharacteristicsThe cell in Fig. 1 consists of a Cu-based ion reservoir (IR) over an electrolyte (EL). When a positive bias is applied to the top electrode, ionized Cu is driven from the IR into the EL [2]. Switching from an initial high resistance state (HRS) to a low resistance state (LRS) occurs when the local Cu concentration in the EL becomes sufficient to facilitate electron transport.The cell I-V curve in Fig. 2 illustrates the forming, reset, and set events. While initial forming occurs at 4.2V, the set voltage during subsequent cycles is 2V lower, suggesting the structure is altered upon forming, such that a preferential, lower barrier path is established. This is interpreted as stress-induced channel formation [3]. The forming voltage for the cell materials in Fig. 3 is below the breakdown bias of the EL. Hence, the conductive bridge is formed without breakdown, since metal cations are supplied from an external reservoir; in contrast to oxygen vacancy ReRAM, which relies on soft breakdown to liberate oxygen anions from within the switching region [4]. The estimated number of Cu atoms required to form the conductive bridge ranges from 10-200, based on DFT simulations of a model system in Fig. 4, and the resistance of the bridge in Fig. 5 depends on the quantity of metal transported into the EL, which is inversely related to the set current compliance (I-set). To reset the device, a positive bias is applied to the bottom electrode, to oxidize Cu in the bridge and transport it back to the IR. The onset of reset in Fig. 2 begins at -0.5V, which is ~5x greater than that for similar Ag-based ReRAM cells [5,6].The switching times τ in Fig. 6 follow the form log(τ) ∝ -V , and under nominal conditions, reset occurs slightly faster than set, while forming occurs much slower than set and reset.The virgin and HRS currents both exhibit exponential dependence on voltage, consistent with trap assisted tunneling or hopping-type transport. The activation energy Ea in Fig. 7 is 155meV and is reduced by the applied electric field. While the LRS I-V behavior is roughly linear with voltage, an 8meV Ea suggests the conductance is not purely metallic; and LRS read noise exhibits RTN behavior with a 1/f power spectral density in Fig. 8, characteristic of multiple RTN centers.

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“…Thanks to optimal performance in terms of high endurance [1], [2], high speed [3], [4] and low power consumption [5] resistance-switching memory (RRAM) is attracting a broad interest for possible applications as future scalable memory for high density storage and storage class memory (SCM) [6]- [8]. However, many issues still need to be addressed, e.g.…”

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