A continuous process for Si nanowires with prescribed lengths

Kim, Jungkil; Rhu, Hyun; Lee, Woo

doi:10.1039/c1jm13831f

Cited by 29 publications

(28 citation statements)

References 24 publications

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“…In stepwise EMaCE, the sidewall angle increased stepwise. In both cases, some discontinuity on the smooth sidewall can be observed (insets of Figure 5 (d) and (f)).These sharp turns show the geometric response of etching profile to the attenuation of applied bias [29][30]. Also, the etching profiles are uniform across the whole chips, as illustrated by the low-magnification SEM images of polymer replica (…”

mentioning

confidence: 75%

Deep Etching of Single- and Polycrystalline Silicon with High Speed, High Aspect Ratio, High Uniformity, and 3D Complexity by Electric Bias-Attenuated Metal-Assisted Chemical Etching (EMaCE)

Zhao

Wong

2014

ACS Appl. Mater. Interfaces

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In this work, a novel wet silicon (Si) etching method, electric bias-attenuated metal-assisted chemical etching (EMaCE), is demonstrated to be readily available for three-dimensional (3D) electronic integration, microelectromechinal systems, and a broad range of 3D electronic components with low cost. On the basis of the traditional metal-assisted chemical etching process, an electric bias was applied to the Si substrate in EMaCE. The 3D geometry of the etching profile was effectively controlled by the bias in a real-time manner. The reported method successfully fabricated an array of over 10 000 vertical holes with diameters of 28 μm on 1 cm(2) silicon chips at a rate of up to 11 μm/min. The sidewall roughness was kept below 50 nm, and a high aspect ratio of over 10:1 was achieved. The 3D geometry could be attenuated by the variable applied bias in real time. Vertical deep etching was realized on (100)-, (111)-Si, and polycrystalline Si substrates. Complex features with lateral dimensions of 0.8-500 μm were also fabricated with submicron accuracy.

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confidence: 75%

Deep Etching of Single- and Polycrystalline Silicon with High Speed, High Aspect Ratio, High Uniformity, and 3D Complexity by Electric Bias-Attenuated Metal-Assisted Chemical Etching (EMaCE)

Zhao

Wong

2014

ACS Appl. Mater. Interfaces

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“…For the nanowire synthesis, we employed a continuous Si MACE (20,21) with various seeding layers (Fig. 1).…”

Section: Resultsmentioning

confidence: 99%

Roll up nanowire battery from silicon chips

Vlad

Reddy

Ajayan

et al. 2012

Proc. Natl. Acad. Sci. U.S.A.

124

106

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Here we report an approach to roll out Li-ion battery components from silicon chips by a continuous and repeatable etch-infiltratepeel cycle. Vertically aligned silicon nanowires etched from recycled silicon wafers are captured in a polymer matrix that operates as Li þ gel-electrolyte and electrode separator and peeled off to make multiple battery devices out of a single wafer. Porous, electrically interconnected copper nanoshells are conformally deposited around the silicon nanowires to stabilize the electrodes over extended cycles and provide efficient current collection. Using the above developed process we demonstrate an operational full cell 3.4 V lithium-polymer silicon nanowire (LIPOSIL) battery which is mechanically flexible and scalable to large dimensions.polymer electrolyte | core-shell nanowires | energy storage | flexible electronics | waste management S ilicon is a promising anode material in lithium batteries due to its high specific capacity and low operation voltage (1). However, the major concern in using Si-based anodes is the huge volume expansion during the lithiation that leads to a fast degradation of the electrode material and a reduced life cycle of the battery with limited use in real life Li-ion applications. The advent of nanotechnology and successful incorporation of nanostructured materials in energy storage devices has further grown an interest in revisiting Si as an active anode material. The enhancement in the electrochemical performance of nanostructured Si anodes provides novel platforms for the ubiquitous presence of Si in Li-ion batteries (2-4). Through nanostructuring, the active Si pulverization was minimized yielding stable capacity retention. However, this was found insufficient to maintain a uniform electrical interface and adequate mechanical contact between the active Si particles and the conductive additives, calling for the development of new binder materials (5-7). Avoiding binders or conductive additives and enabling a direct contact between Si and the current collector is the other way to maintain the electrical conductivity and mechanical integrity of the electrode. This requires special designs of the current collector complying with the ensuing active material deposition. The optimal alternative so far is provided by the use of nanowires, nanotubes, or hierarchical assemblies directly grown, assembled, or bonded onto the current collector (8-12).Current collectors integrated with Si anodes have been successfully fabricated through chemical or physical vapor deposition methods, room temperature metal assisted chemical etching (MACE), as well as through various top-down methods (8,9,(12)(13)(14)(15). One of the major drawbacks of the respective configurations is the relatively low tap density of the Si nanostructures leading to low mass loading of active material and low volumetric capacities. Moreover, excess of current collector is usually employed in this configuration rendering them less attractive for high-throughput battery manufacturing (16). Low compactio...

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“…Any progress in silicon nanowires would be exciting due to their compatibility with the current mainstream silicon‐based semiconductor industry. Porous silicon (PSi) with many electronic states could be fabricated with a metal‐assisted chemical erosion method on crystal silicon (CSi) nanowires . Kim et al fabricated a hybrid CSi‐PSi‐CSi one‐dimensional nanostructure in which the PSi acted as a reservoir of high‐density localized electronic states and the CSi connected to electrodes acted as a carrier migration channel (Figure I‐J).…”

Section: Nanowire Photodetectorsmentioning

confidence: 99%

“…NW, nanowire; SEM, scanning electron microscopy; TEM, tunneling electron microscopy nanowires. 151 Kim et al fabricated a hybrid CSi-PSi-CSi one-dimensional nanostructure in which the PSi acted as a reservoir of high-density localized electronic states and the CSi connected to electrodes acted as a carrier migration channel 150 (Figure 12I-J). Normally, the dark current was only a few picoamps even when a voltage bias was applied to the device due to the injected carriers being trapped in localized electronic states along the PSi segment.…”

Section: Nanowire Photodetectorsmentioning

confidence: 99%

Compositional and structural engineering of inorganic nanowires toward advanced properties and applications

Sun

et al. 2019

InfoMat

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As natural one‐dimensional confined electron transport channels and photon propagation paths, nanowires (NWs) display unmatched properties and huge potential for application in diverse fields. The ability to construct a nanoscale functional system would enable significant advances in the currently desired miniaturized device integration. To date, the basic properties of all types of nanowire crystals, including metallic NWs, as well as group IV‐related, III‐V/II‐VI compounds, and metal oxide NWs, are well understood. Regarding future work, compositional (ie, doping and alloying) and structural (defect and heterostructure) designs to flexibly realize custom‐made functionality are emphasized. Along this line, recent progress is reviewed, including the basic properties (nanowire mechanics, electronics, and photonics) and applications such as photodetectors and chemical/biological sensors. A review of the correlations between the compositional/structural configuration of nanowires and the corresponding functionality is also presented. The future development direction of this field is concluded and highlighted at the end.

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A continuous process for Si nanowires with prescribed lengths

Cited by 29 publications

References 24 publications

Deep Etching of Single- and Polycrystalline Silicon with High Speed, High Aspect Ratio, High Uniformity, and 3D Complexity by Electric Bias-Attenuated Metal-Assisted Chemical Etching (EMaCE)

Deep Etching of Single- and Polycrystalline Silicon with High Speed, High Aspect Ratio, High Uniformity, and 3D Complexity by Electric Bias-Attenuated Metal-Assisted Chemical Etching (EMaCE)

Roll up nanowire battery from silicon chips

Compositional and structural engineering of inorganic nanowires toward advanced properties and applications

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