A comparison of voting strategies for fault-tolerant distributed systems

Blough, Douglas M.; Sullivan, Gregory F.

doi:10.1109/reldis.1990.93959

Cited by 67 publications

(40 citation statements)

References 8 publications

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“…There are several voting strategies. These are majority, median or plurality [3]. At low redundancy factors (N < 7) the implementation of majority voter is more efficient [4].…”

Section: Fault Tolerant Votermentioning

confidence: 99%

A Fault Tolerant Voter Circuit for Triple Modular Redundant System

Rahman¹

2017

JEEE

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Abstract:Defect rate in Nanoelectronics is much higher than conventional CMOS circuits. Hardware redundancy can be a suitable solution for fault tolerance in nano level. A voter circuit is a part of a redundancy based fault tolerant system that enables a system to continue operating properly in the event of one or more faults within its components. Robustness of the voter circuit defines the reliability of the fault tolerant system. This paper provides simulation results and analysis of a fault tolerant voter circuit. In a Triple Modular Redundant (TMR) system, the robustness of the voter circuit has been improved. For this purpose, redundancy at transistor level has been added. In this technique each transistor of the various building blocks (Ex-OR gate, Multiplexer) of the voter circuit is replaced by a quadded-transistor structure. Quadded transistor structure provides built in immunity to all single defects as well as a large number of multiple defects. To evaluate the effectiveness of the voter circuit an IC layout in 90nm CMOS technology is developed. FPNI layout using qNAND hypercell is also designed and analysed. By simulation procedure it has been shown that the proposed fault tolerant voter circuit works properly as a majority voter in different faulty conditions of a TMR system. Moreover, it has been shown that in the presence of internal hardware failure (failure in transistor level) the voter circuit works properly.

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“…There are several voting strategies. These are majority, median or plurality [3]. At low redundancy factors (N < 7) the implementation of majority voter is more efficient [4].…”

Section: Fault Tolerant Votermentioning

confidence: 99%

A Fault Tolerant Voter Circuit for Triple Modular Redundant System

Rahman¹

2017

JEEE

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“…Terminal policies, on the other hand, make the final decision on how to unify the results of the redundant computations. This category includes the adjudicator policy that implements common voting strategies [11]. Currently, our framework includes a (weighted) mean voter, a median voter, and an exact majority voter based on the MJRTY algorithm [12].…”

Section: A Fault-handling Policiesmentioning

confidence: 99%

ROSE::FTTransform - A source-to-source translation framework for exascale fault-tolerance research

Lidman

Quinlan

Liao

et al. 2012

IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN 2012)

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Abstract-Exascale computing systems will require sufficient resilience to tolerate numerous types of hardware faults while still assuring correct program execution. Such extreme-scale machines are expected to be dominated by processors driven at lower voltages (near the minimum 0.5 volts for current transistors). At these voltage levels, the rate of transient errors increases dramatically due to the sensitivity to transient and geographically localized voltage drops on parts of the processor chip. To achieve power efficiency, these processors are likely to be streamlined and minimal, and thus they cannot be expected to handle transient errors entirely in hardware. Here we present an open, compiler-based framework to automate the armoring of High Performance Computing (HPC) software to protect it from these types of transient processor errors. We develop an open infrastructure to support research work in this area, and we define tools that, in the future, may provide more complete automated and/or semi-automated solutions to support software resiliency on future exascale architectures. Results demonstrate that our approach is feasible, pragmatic in how it can be separated from the software development process, and reasonably efficient (0% to 30% overhead for the Jacobi iteration on common hardware; and 20%, 40%, 26%, and 2% overhead for a randomly selected subset of benchmarks from the Livermore Loops [1]).

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“…Median voters output the middle and average voters output the average value of the replica output values. Surveys and taxonomies on several voting strategies have been presented [2,8,16].…”

Section: Introductionmentioning

confidence: 99%

VTV - A Voting Strategy for Real-Time Systems

Aysan

Punnekkat

Dobrin

2008

2008 14th IEEE Pacific Rim International Symposium on Dependable Computing

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Real-time applications typically have to satisfy high dependability requirements and require fault tolerance in both value and time domains. A widely used approach to ensure fault tolerance in dependable systems is the N-modular redundancy (NMR) which typically uses a majority voting mechanism. However, NMR primarily focuses on producing the correct value, without taking into account the time dimension. In this paper, we propose a new approach, Voting on Time and Value (VTV), applicable to real-time systems, which extends the modular redundancy approach by explicitly considering both value and timing failures, such that correct value is produced at a correct time, under specified assumptions. We illustrate our voting approach by instantiating it in the context of the well-known triple modular redundancy (TMR) approach. Further, we present a generalized version targeting NMR that enables a high degree of customization from the user perspective.

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A comparison of voting strategies for fault-tolerant distributed systems

Cited by 67 publications

References 8 publications

A Fault Tolerant Voter Circuit for Triple Modular Redundant System

A Fault Tolerant Voter Circuit for Triple Modular Redundant System

ROSE::FTTransform - A source-to-source translation framework for exascale fault-tolerance research

VTV - A Voting Strategy for Real-Time Systems

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