A Comparison of Internal Gettering during Bipolar, CMOS, and CCD (High, Medium, Low Temperature) Processes

Abstract

A manganese sheet was phosphidized at 400~176 in phosphorus vapor at 1 atm by a sealed-tube method. The following conclusions were drawn:1. All the phosphidization reactions were parabolic and therefore rate apparently limited by a diffusion process.2. A marker experiment indicated that the component which diffused was not phosphorus, but was manganese.3. The parabolic rate constant K, was given as a function of the absolute temperature by the following expression K, = 4.55 exp (-24.1 x 103 cal -mol-1/RT)g 2 cm -4 h -I, (1 atm, 673-873 K) 4. X-ray diffraction patterns and an electron probe microanalysis of the product phosphide films showed that at 400~ a thin single layer composed of MnP alone was formed, but at 450~176 double layers composed of outer MnP and inner Mn2P were formed.

Effect of Postannealing on the Oxygen Precipitation and Internal Gettering Process in N/N+ (100) Epitaxial Wafers

“…5 and 8. Similar observation on deterioration of the CCD devices due to lack of the DNZ has also been made and reported elsewhere (31). In the latter case, lifetime degradation could be contributed by a reduction in gettering efficiency after oxygen precipitation reaches completion.…”

Effect of Pattern Orientation on the Resistance to Process‐Induced Dislocation Generation in (100) Silicon

“…It has been well established that stresses introduced during processing by thermal gradients during heating/ cooling (9, 10) or during poly (8) or nitride layer (11,12) depositions can generate dislocations. The dislocation generation could be a serious problem in silicon wafers w i t h low m e c h a n i c a l s t r e n g t h s u c h as float zone silicon, w h i c h h a s n o o x y g e n to give d i s l o c a t i o n p i n n i n g (13,14), or i n t e r n a l l y g e t t e r e d wafers w i t h o u t o p t i m i z e d precipit a t e m o r p h o l o g y (15,16) 17), a n d t h u s r e s u l t in h i g h dislocation densities at the pattern edges.…”

Effects of Bulk Microdefects and Metallic Impurities on p–n Junction Leakage Currents in Silicon

“…Both are induced from bulk microdefects or metallic impurities at the p-n junction, and they are thus associated with the leakage current flowing at the p-n junction. 10) However, it is almost impossible to evaluate the quality of silicon wafers to determine whether there would be the failure of image sensors in the forms of dark currents or white defects because their evaluation requires complicated device processing such as p-n junction processing. Moreover, these processes make it difficult to search for the origins of failures.…”