A Comparison of fault-tolerant memories in SRAM-based FPGAs

Rollins, Nathaniel; Fuller, Megan M.; Wirthlin, Michael

doi:10.1109/aero.2010.5446661

Cited by 16 publications

(4 citation statements)

References 10 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…For instance, methodologies focused on the memory in [9] are validated on simple memories without the additional logic around. In [10], the fault-tolerance technique is presented only on a two-input multiplexer, one simple adder and one counter.…”

Section: Related Workmentioning

confidence: 99%

The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-Mechanical Applications

Podivinsky

Cekan

Šimková

et al. 2014

2014 17th Euromicro Conference on Digital System Design

View full text Add to dashboard Cite

The aim of this paper is to present a new platform for estimating the fault-tolerance quality of electro-mechanical applications based on FPGAs. We demonstrate one working example of such EM application that was evaluated using our platform: the mechanical robot and its electronic controller in an FPGA. Different building blocks of the electronic robot controller allow to model different effects of faults on the whole mission of the robot (searching a path in a maze). In the experiments, the mechanical robot is simulated in the simulation environment, where the effects of faults injected into its controller can be seen. In this way, it is possible to differentiate between the fault that causes the failure of the system and the fault that only decreases the performance. Further extensions of the platform focus on the interconnection of the platform with the functional verification environment working directly in FPGA that allows automation and speed-up of checking the correctness of the system after the injection of faults.

show abstract

Section: Related Workmentioning

confidence: 99%

The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-Mechanical Applications

Podivinsky

Cekan

Šimková

et al. 2014

2014 17th Euromicro Conference on Digital System Design

View full text Add to dashboard Cite

show abstract

“…Compared to other options, it is a relatively high-overhead technique, since it requires more than three times the hardware of an equivalent unprotected system. However, it often provides superior reliability as compared to error correction codes, self-checking pairs, and other methods of fault tolerance [15], so it remains an attractive choice. One caveat is that TMR loses its reliability advantage if the mission duration becomes too long.…”

Section: A General Description and Justificationmentioning

confidence: 99%

Increasing Radiation Tolerance of Field-Programmable-Gate-Array-Based Computers Through Redundancy and Environmental Awareness

Hane

LaMeres

Kaiser

et al. 2014

Journal of Aerospace Information Systems

View full text Add to dashboard Cite

Radiation-tolerant computing is of great importance to the aerospace community because future missions demand more computational power. Of special interest to the aerospace community are flight computers implemented on static random-access-memory-based field-programmable gate arrays. Such computer systems allow the in-flight reconfiguration of hardware that enables the practical deployment of truly reconfigurable computers. However, commercial static random-access-memory-based field-programmable gate arrays are uniquely susceptible to ionizing radiation. This paper introduces a computer architecture for static random-access-memory-based field-programmable gate arrays that resists failures caused by ionizing radiation. The approach extends the widely accepted fault mitigation practice of triple modular redundancy and configuration memory scrubbing by adding spare circuitry and environmental awareness through an ionizing radiation sensor. This paper describes the design of the system in addition to a theoretical analysis of its reliability using a Markov model and empirical analysis using a fault injector. A full system prototype is presented that includes a custom radiation sensor and a computer system implemented on a Xilinx Virtex-6 field-programmable gate array. Both the theoretical analysis and laboratory testing show the approach to be significantly more reliable than field-programmable-gate-array-based computers using only triple modular redundancy and scrubbing.

show abstract

“…This is also beneficial for the embedded Block RAMs. Rollins et al [16] showed that redundancy is the only effective mitigation approach because other mitigation techniques (like error detection and correction codes) rely on additional logic that must be implemented as part of the potentially unreliable FPGA fabric. In theory, internal Error-Correcting Code (ECC) logic found in some types of SRAM-based FPGAs could be used instead.…”

Section: Stream Processor Architecturementioning

confidence: 99%

Availability analysis for satellite data processing systems based on SRAM FPGAs

Siegle

Vladimirova

Ilstad

et al. 2016

IEEE Trans. Aerosp. Electron. Syst.

View full text Add to dashboard Cite

Abstract-This paper presents a novel methodology, which allows a systematic availability analysis of satellite payload data processing systems implemented on SRAM-based FPGAs. The methodology allows (i) comparison of different Fault Detection, Isolation and Recovery (FDIR) schemes and (ii) prediction of the expected system availability in a particular radiation environment. Furthermore, it advances the state of the art by analysing embedded Block RAMs and employing a novel fault injection algorithm that enables more complex stochastic models. The applicability of the method is demonstrated by a case study representing a high availability payload data processing application. Since Block RAMs are also taken into account, the availability prediction precision is greatly increased. It is shown that the reliability prediction for two border cases, in which the Block RAMs are either ignored or assumed to be fully susceptible, can differ as much as 75%. With the proposed Block RAM profiling tool it is possible to determine a realistic reliability figure that is eventually required for the accurate estimation of the system availability.

show abstract

A Comparison of fault-tolerant memories in SRAM-based FPGAs

Cited by 16 publications

References 10 publications

The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-Mechanical Applications

The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-Mechanical Applications

Increasing Radiation Tolerance of Field-Programmable-Gate-Array-Based Computers Through Redundancy and Environmental Awareness

Availability analysis for satellite data processing systems based on SRAM FPGAs

Contact Info

Product

Resources

About