A compact LDMOS DDSCR for HV ESD protections with high robustness and reliability

Chen, Zhuojun; Lu, Wenzhao; Ming, Wu; Peng, Wei; Hu, Yuanyuan; Li, Bo; Zeng, Yun; Jin, Xiangliang

doi:10.1016/j.sse.2019.107640

Cited by 3 publications

(1 citation statement)

References 16 publications

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“…Lee found that a P+ strip inserted into drain region can improve the ESD failure threshold of embedded SCR LDMOS device [11]. Some other novel structures and their performance were studied for different application purposes in [12][13][14][15][16].…”

Section: Introductionmentioning

confidence: 99%

Design, Fabrication and Measurement of LDNMOSSCR Devices with Appropriate ESD Protection Window for 18V HV CDMOS Process

2022

Informacije MIDEM

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Lateral Double Diffused MOSFET (LDMOS) embedded Silicon Controlled Rectifier (SCR) is a normal way to improve the Electro-Static Discharge (ESD) robustness for smart power technologies, but it doesn't always have the proper ESD window for a given application. In this paper, LDNMOS-SCR of four variants structures have been investigated based on a high-voltage (HV) 0.5μm 18V HV CDMOS process with 2D device simulation and silicon verification. Transmission Line Pulse (TLP) testing results demonstrated that those devices successfully elevate the second breakdown current I t2 from original 1.146A to above 3A; source isolated device has a lower trigger voltage V t1 (45.79V) than source non-isolated devices; the holding voltage V h of the four devices is related to their structure, and their holding current I h are all above 800mA, which is big enough to ensure the latch-up immunity under ESD stresses in HV applications. The device with its source isolated from PSUB is the suitable ESD protection device for HV 18V CDMOS technology owning to its strong ESD robustness, low V t1 , small on-resistance Ron and sufficiently big I h .

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Section: Introductionmentioning

confidence: 99%