A Compact Formulation for Avalanche Multiplication in SiGe HBTs at High Injection Levels

Jaoul, Mathieu; Maneux, Cristell; Céli, D.; Schröter, M.; Zimmer, Thomas

doi:10.1109/ted.2018.2875494

Cited by 16 publications

(9 citation statements)

References 13 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…From this figure, an expression of K F has been formulated as functions of J AV L and V CB . Indeed, in [3,8,10], the decline of K F parameter at large current densities is due to the reduction of J AV L as demonstrated in [7].…”

Section: Generation Ratementioning

confidence: 91%

“…For this reason, the expression of K F has been modified by introducing the J AV L parameter which can be obtained using the new avalanche model [7] as,…”

Section: Generation Ratementioning

confidence: 99%

“…Since HCD is a consequence of the impact ionization mechanism [6], the resulting avalanche current has to be accurately predicted at low and high current densities. A formulation for the avalanche multiplication factor has recently been proposed in [7] for extending the validation range of the avalanche multiplication factor up to high current densities. Thus, the extraction flow of the aging compact model parameters must start with an accurate extraction of the associated new avalanche parameters.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Scalable compact modeling of trap generation near the EB spacer oxide interface in SiGe HBTs

Couret

Jaoul

Fabert

et al. 2020

Solid-State Electronics

Self Cite

View full text Add to dashboard Cite

HAL is a multidisciplinary open access archive for the deposit and dissemination of scientific research documents, whether they are published or not. The documents may come from teaching and research institutions in France or abroad, or from public or private research centers. L'archive ouverte pluridisciplinaire HAL, est destinée au dépôt et à la diffusion de documents scientifiques de niveau recherche, publiés ou non, émanant des établissements d'enseignement et de recherche français ou étrangers, des laboratoires publics ou privés.

show abstract

Section: Generation Ratementioning

confidence: 91%

“…For this reason, the expression of K F has been modified by introducing the J AV L parameter which can be obtained using the new avalanche model [7] as,…”

Section: Generation Ratementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Scalable compact modeling of trap generation near the EB spacer oxide interface in SiGe HBTs

Couret

Jaoul

Fabert

et al. 2020

Solid-State Electronics

Self Cite

View full text Add to dashboard Cite

show abstract

“…This version also considers the effects of the correlated noise, added as a result of research reported in [116]. It is expected that the model will continue to evolve; for instance, shortly prior to the publication of this article, HICUM was extended to include the avalanche multiplication in SiGe HBTs at different transistor injection levels [117]. A detailed description of HICUM, including the definition of all symbols used in Figure 8, can be found in the HICUM/L2 manual by Schroter and Pawlak [113].…”

Section: Modeling For Re-engineered Terahertz Researchmentioning

confidence: 99%

Emerging Transistor Technologies Capable of Terahertz Amplification: A Way to Re-Engineer Terahertz Radar Sensors

Božanić

Sinha

2019

Sensors

View full text Add to dashboard Cite

This paper reviews the state of emerging transistor technologies capable of terahertz amplification, as well as the state of transistor modeling as required in terahertz electronic circuit research. Commercial terahertz radar sensors of today are being built using bulky and expensive technologies such as Schottky diode detectors and lasers, as well as using some emerging detection methods. Meanwhile, a considerable amount of research effort has recently been invested in process development and modeling of transistor technologies capable of amplifying in the terahertz band. Indium phosphide (InP) transistors have been able to reach maximum oscillation frequency (fmax) values of over 1 THz for around a decade already, while silicon-germanium bipolar complementary metal-oxide semiconductor (BiCMOS) compatible heterojunction bipolar transistors have only recently crossed the fmax = 0.7 THz mark. While it seems that the InP technology could be the ultimate terahertz technology, according to the fmax and related metrics, the BiCMOS technology has the added advantage of lower cost and supporting a wider set of integrated component types. BiCMOS can thus be seen as an enabling factor for re-engineering of complete terahertz radar systems, for the first time fabricated as miniaturized monolithic integrated circuits. Rapid commercial deployment of monolithic terahertz radar chips, furthermore, depends on the accuracy of transistor modeling at these frequencies. Considerations such as fabrication and modeling of passives and antennas, as well as packaging of complete systems, are closely related to the two main contributions of this paper and are also reviewed here. Finally, this paper probes active terahertz circuits that have already been reported and that have the potential to be deployed in a re-engineered terahertz radar sensor system and attempts to predict future directions in re-engineering of monolithic radar sensors.

show abstract

“…Fig.1 : Safe-Operating-Area definition for HBT Yet, some studies have shown that the SOA can be extended beyond BVCEO since open-base configuration is not commonly used by circuit designers. Accordingly, the HiCuM compact model has been extended beyond BVCEO and up to BVCBO in [3]. This extension must be deeply investigated since hot-carrier degradation appears beyond BVCEO and leads to the DC transistor performance degradation [4]- [6].…”

Section: Introductionmentioning

confidence: 99%

Physical, small-signal and pulsed thermal impedance characterization of multi-finger SiGe HBTs close to the SOA edges

Couret

Fischer

Fregonèse

et al. 2019

2019 IEEE 32nd International Conference on Microelectronic Test Structures (ICMTS)

Self Cite

View full text Add to dashboard Cite

A thermal impedance model of single-finger and multi-finger SiGe heterojunction bipolar transistors (HBTs) is presented. The heat flow analysis through the device has to be considered in two diffusion parts: the front-end-of-line (FEOL) diffusion and the back-end-of-line (BEOL) diffusion. Therefore, this new thermal impedance model features multi-poles network which has been incorporated in HiCuM L2 compact model. The HiCuM compact model simulation results are compared with on-wafer low-frequency S-parameters measurements at room temperature highlighting the device frequency dependence of self-heating mechanism. The simulation results are also compared to pulse measurements to improve reliability analysis.

show abstract

A Compact Formulation for Avalanche Multiplication in SiGe HBTs at High Injection Levels

Cited by 16 publications

References 13 publications

Scalable compact modeling of trap generation near the EB spacer oxide interface in SiGe HBTs

Scalable compact modeling of trap generation near the EB spacer oxide interface in SiGe HBTs

Emerging Transistor Technologies Capable of Terahertz Amplification: A Way to Re-Engineer Terahertz Radar Sensors

Physical, small-signal and pulsed thermal impedance characterization of multi-finger SiGe HBTs close to the SOA edges

Contact Info

Product

Resources

About