A compact and low loss Y-junction for submicron silicon waveguide

Zhang, Yi; Yang, Shaoshi; Lim, Andy Eu-Jin; Lo, Guo‐Qiang; Galland, Christophe; Baehr‐Jones, Tom; Hochberg, Michael

doi:10.1364/oe.21.001310

Cited by 343 publications

(198 citation statements)

References 16 publications

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“…This is because some reflection will arise from a sharp corner while a flattened or rounded corner may disturb the mode sorting. Fortunately, some experimental results about the asymmetric Y-junctions in the mode-division-multiplexing (MDM) applications have been reported [42,43] and improved schemes have been demonstrated to reduce the Y-junction loss considerably [44].…”

Section: Device Performance Characterization and Fabrication Tolerancmentioning

confidence: 99%

A silicon-on-insulator polarization diversity scheme in the mid-infrared

et al. 2015

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Abstract:We propose a silicon-on-insulator (SOI) polarization diversity scheme in the mid-infrared wavelength range. In consideration of absorption loss in silicon dioxide (SiO 2 ), the polarization splitter-rotator (PSR) is designed and optimized with silicon nitride (SiN) upper-cladding and SiO 2 lower-cladding. This asymmetry allows the PSR, which consists of mode-conversion tapers and subsequent mode-sorting asymmetric Yjunctions, to be fabricated with a simple one-step etching process. Simulation shows that our PSR has good performance with low mode conversion loss (< 0.25 dB) and low crosstalk (< -18 dB) in a very large wavelength range from 4.0 μm to 4.4 μm. The PSR also exhibits large fabrication tolerance with respect to the size deviations in waveguide width, height and refractive index of the upper-cladding. Additionally, PSR devices based on Y-junctions with SiO 2 upper-cladding, and SiN upper-and lower-claddings are designed for potential applications at shorter and longer wavelengths, respectively. These PSR devices could facilitate the development of silicon photonic devices in the mid-infrared.

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Section: Device Performance Characterization and Fabrication Tolerancmentioning

confidence: 99%

A silicon-on-insulator polarization diversity scheme in the mid-infrared

et al. 2015

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“…A grating coupler loop, compared to a single grating coupler, helps fiber array alignment and measurement of the grating coupler insertion loss. Insertion loss of the y-junction is well characterized 3 and could be easily normalized out.…”

Section: Silicon Chip Layoutmentioning

confidence: 99%

“…1 Silicon photonics has attracted extensive academic and industrial attention as a solution for nextgeneration high-speed, low-energy consumption, and lowcost communication systems. The last decade witnessed tremendous enrichment and maturation of the silicon photonics device library, including high-performance passive components, [2][3][4] silicon modulators, 5 germanium on silicon photodetectors, 6,7 and hybrid integrated lasers. [8][9][10][11] Almost all silicon photonics devices demonstrated to date operate in the Cband (1530 to 1565 nm), which is within the fiber loss and erbium amplification window and is ideal for longhaul communications.…”

Section: Introductionmentioning

confidence: 99%

Quantum dot semiconductor optical amplifier/silicon external cavity laser for O-band high-speed optical communications

Yang

Zhang

et al. 2015

Opt. Eng

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Abstract. We report a hybrid integrated external cavity laser by butt coupling a quantum dot reflective semiconductor optical amplifier and a silicon-on-insulator chip. The device lasers at 1302 nm in the O-band, a wavelength regime critical to data communication systems. We measured 18 mW on-chip output power and over 50-dB side-mode suppression ratio. We also demonstrated open eye diagrams at 10 and 40 Gb∕s. © The Authors.Published by SPIE under a Creative Commons Attribution 3.0 Unported License. Distribution or reproduction of this work in whole or in part requires full attribution of the original publication, including its DOI.

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“…To minimize insertion loss, the OpSIS-IME platform uses an optimized y-junction geometry that has been tested to have 0.28 ± 0.02 dB insertion loss [17]. The simulated electric field can be seen in Figure 5.…”

Section: Y Junctionsmentioning

confidence: 99%

“…Yield and variation data between different lots continues to be generated as more silicon is run, and will be vital for continuing development. Commercial processes like Luxtera's are at a higher Figure 12 Contour plot of cross wafer y-junction performance [17].…”

Section: Design For Manufacturability and Yield Managementmentioning

confidence: 99%

Progress in silicon platforms for integrated optics

Novack¹,

Streshinsky²,

Ding

et al. 2014

Nanophotonics

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Rapid progress has been made in recent years repurposing CMOS fabrication tools to build complex photonic circuits. As the field of silicon photonics becomes more mature, foundry processes will be an essential piece of the ecosystem for eliminating process risk and allowing the community to focus on adding value through clever design. Multi-project wafer runs are a useful tool to promote further development by providing inexpensive, low-risk prototyping opportunities to academic and commercial researchers. Compared to dedicated silicon manufacturing runs, multi-project-wafer runs offer cost reductions of 100 × or more. Through OpSIS, we have begun to offer validated device libraries that allow designers to focus on building systems rather than modifying device geometries. The EDA tools that will enable rapid design of such complex systems are under intense development. Progress is also being made in developing practical optical and electronic packaging solutions for the photonic chips, in ways that eliminate or sharply reduce development costs for the user community. This paper will provide a review of the recent developments in silicon photonic foundry offerings with a focus on OpSIS, a multiproject-wafer foundry service offering a silicon photonics platform, including a variety of passive components as well as high-speed modulators and photodetectors, through the Institute of Microelectronics in Singapore.

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A compact and low loss Y-junction for submicron silicon waveguide

Cited by 343 publications

References 16 publications

A silicon-on-insulator polarization diversity scheme in the mid-infrared

A silicon-on-insulator polarization diversity scheme in the mid-infrared

Quantum dot semiconductor optical amplifier/silicon external cavity laser for O-band high-speed optical communications

Progress in silicon platforms for integrated optics

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