A CMOS Time-to-Digital Converter With Better Than 10 ps Single-Shot Precision

Jansson, Jussi-Pekka; Mantyniemi, A.; Kostamovaara, J.

doi:10.1109/jssc.2006.874281

Cited by 214 publications

(72 citation statements)

References 22 publications

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“…The ADC uses 17 comparators and time to digital converter (TDC) to measure the time between samples. As an example, consider a TDC area reported in [14] with active area 1.1 mm 2 . The estimated chip area of the whole ADC is then about 1.8 mm 2 .…”

Section: Resultsmentioning

confidence: 99%

A low propagation delay dispersion comparator for a level-crossing AD converter

Kozmin

Johansson

Kostamovaara

2009

Analog Integr Circ Sig Process

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This paper presents the design of a continuous time voltage comparator with low propagation delay dispersion. The comparator is intended to be used as a building block for a level-crossing AD converter: a type of AD converter where the sampling moments are triggered when an input signal crosses predetermined threshold levels. This type of system sets very high demands on the time measurement and the comparator to achieve the desired performance. The comparator design is based on several techniques to minimize the comparator propagation delay dispersion. The comparator has been implemented in a 0.35 lm BiCMOS process. Measured results show good agreement with simulations. The slew rate related propagation delay dispersion is measured to 90 ps for an input frequency range from 3 to 10 MHz and amplitudes from 200 mV to 1.65 V. The comparator static power consumption is 9 mW.

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Section: Resultsmentioning

confidence: 99%

A low propagation delay dispersion comparator for a level-crossing AD converter

Kozmin

Johansson

Kostamovaara

2009

Analog Integr Circ Sig Process

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“…Each of PM modules may contain one or more delay lines in many different configurations. For example, to improve of the TDCs resolution may be used an vernier (Zieliński et al 2005), pulse shrinking (Zhang and Zhou 2015;Szplet and Klepacki 2010) and interpolation techniques (Jansson et al 2006) where effective resolution depends on the difference between two various LEs propagation times. In other cases, for decrease a dead time and adaptation to multichannel solutions we apply a Flash-like architecture with direct coding lines (Ugur et al 2012).…”

Section: Flash-like Tdc Architecturementioning

confidence: 99%

Optical methods of the delay cells characteristics measurements and their applications

2016

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The only efficient optical spectrum measurement in infra-red range for low light regime is based on time multiplexing. Typically low timing jitter of the single photon detector combined with fast and high precision electronics is used for photon arrival time measurement. The timing histogram can be used to determine the spectrum of the photons. The better time detection accuracy allows to obtain the more precise spectrum information. This paper proposed an optical method for the sub-picosecond time-to-digital converters characterization prefer to optimize the multi-tapped delay lines implementation process, thus yielding the converters with much improved parameters.

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“…7,8,9,10,11 On the other hand, digital interpolation uses a gate delay to estimate the fractional clock cycles. 12,13,14,15,16,17,18,19,20 A simple TDC consists of a high frequency clock and a counter incremented at each clock edge. In such a case, the resolution is limited by the use of the reference clock frequency.…”

Section: Introductionmentioning

confidence: 99%

Time-to-digital converter based on analog time expansion for 3D time-of-flight cameras

Tanveer

Nissinen

et al. 2014

SPIE Proceedings

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This paper presents an architecture and achievable performance for a time-to-digital converter, for 3D time-offlight cameras. This design is partitioned in two levels. In the first level, an analog time expansion, where the time interval to be measured is stretched by a factor k, is achieved by charging a capacitor with current I, followed by discharging the capacitor with a current I k . In the second level, the final time to digital conversion is performed by a global gated ring oscillator based time-to-digital converter. The performance can be increased by exploiting its properties of intrinsic scrambling of quantization noise and mismatch error, and first order noise shaping. The stretched time interval is measured by counting full clock cycles and storing the states of nine phases of the gated ring oscillator. The frequency of the gated ring oscillator is approximately 131 MHz, and an appropriate stretch factor k, can give a resolution of ≈ 57 ps. The combined low nonlinearity of the time stretcher and the gated ring oscillator-based time-to-digital converter can achieve a distance resolution of a few centimeters with low power consumption and small area occupation. The carefully optimized circuit configuration achieved by using an edge aligner, the time amplification property and the gated ring oscillator-based time-to-digital converter may lead to a compact, low power single photon configuration for 3D time-of-flight cameras, aimed for a measurement range of 10 meters.

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A CMOS Time-to-Digital Converter With Better Than 10 ps Single-Shot Precision

Cited by 214 publications

References 22 publications

A low propagation delay dispersion comparator for a level-crossing AD converter

A low propagation delay dispersion comparator for a level-crossing AD converter

Optical methods of the delay cells characteristics measurements and their applications

Time-to-digital converter based on analog time expansion for 3D time-of-flight cameras

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