2013
DOI: 10.1088/1674-4926/34/3/035007
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A CMOS low power, process/temperature variation tolerant RSSI with an integrated AGC loop

Abstract: A low voltage low power CMOS limiter and received signal strength indicator (RSSI) with an integrated automatic gain control (AGC) loop for a short-distance receiver are implemented in SMIC 0.13 m CMOS technology. The RSSI has a dynamic range of more than 60 dB and the RSSI linearity error is within ˙0.5 dB for an input power from -65 to -8 dBm. The RSSI output voltage is from 0.15 to 1 V and the slope of the curve is 14.17 mV/dB while consuming 1.5 mA (I and Q paths) from a 1.2 V supply. Auto LNA gain mode se… Show more

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“…From Equation (12), while V I decreases, the deviation of the RSSI value due to A variation increases, and while V I increases, the deviation of the RSSI value due to V s variation decreases.…”
Section: Rssivmentioning
confidence: 99%
“…From Equation (12), while V I decreases, the deviation of the RSSI value due to A variation increases, and while V I increases, the deviation of the RSSI value due to V s variation decreases.…”
Section: Rssivmentioning
confidence: 99%