A CMOS Fully Differential Σ-Δ A Frequency Synthesizer for 2-Mb/s GMSK Modulation

Abstract

A CMOS fully-differential 2.4-GHz I -A frequency synthesizer for Gaussian Minimum Shift Keying (GMSK) modulation is presented in this paper. The pre-compensation fractional-N PLL is adopted in the modulator. The designed circuits are simulated in a 0.18,um 1P6M CMOS process. The power consumption of the PLL is about 11-mW and the data rate of the modulator can get to 2-Mbits/s.