1994
DOI: 10.1109/4.284719
|View full text |Cite
|
Sign up to set email alerts
|

A CMOS floating-point vector-arithmetic unit

Abstract: This work describes a floating-point arithmetic unit based on the CORDIC algorithm. The unit computes a full set of high level arithmetic and elementary functions: multiplication, division, (co)sine, hyperbolic (co)sine, square root, natural logarithm, inverse (hyperbolic) tangent, vector norm, and phase. The chip has been integrated in 1.6 fm double-metal, n-well CMOS technology and achieves a normalized peak performance of 220 MFLOPS

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1
1

Citation Types

0
3
0

Year Published

1997
1997
2004
2004

Publication Types

Select...
5
2

Relationship

0
7

Authors

Journals

citations
Cited by 23 publications
(3 citation statements)
references
References 13 publications
0
3
0
Order By: Relevance
“…By choosing a recursive (R-CPE) [47], array (A-CPE) [48] or pipelined (P-CPE) [49] architecture, a trade-off between area, throughput and latency is possible, depending on the application in mind. A comparison of these different CPE realisations, designed in accordance with the specification given in Tab.…”
Section: Hardware Implementation Of the Qrd-rls Algorithmmentioning
confidence: 99%
“…By choosing a recursive (R-CPE) [47], array (A-CPE) [48] or pipelined (P-CPE) [49] architecture, a trade-off between area, throughput and latency is possible, depending on the application in mind. A comparison of these different CPE realisations, designed in accordance with the specification given in Tab.…”
Section: Hardware Implementation Of the Qrd-rls Algorithmmentioning
confidence: 99%
“…LUT size may be further compressed [3], implying additional hardware, which also may introduce additional spurious contributions to the output spectrum. High-resolution FGs may be implemented with LUT-free hardware, by means of the CORDIC algorithms [4][5][6]. Here the amplitudes are obtained by iteratively rotating the vector (x i , y i ) in the polar plane.…”
Section: Function Generatorsmentioning
confidence: 99%
“…In rotation mode, the processor performs polary vector CORDIC theory based on work by Walther [2] in 1971. rotation, while in the vectoring mode the magnitude and the From then on, the algorithm is widely-studied in many angle of an initial vector are computed. a. is thus aspects like arithmetic coprocessor, radar signal processor, determined by robotics, digital signal and image processing etc [7]. de igz fmb( The avionics onboard aerospace craft or satellite suffer a sign(zi) for m =01,-3I very harsh radiation environment, where the energetic Z =sign(-xiyi) for m = O particles such as protons and ions can cause them invalid.…”
Section: Introductionmentioning
confidence: 99%