High-Performance Fault-Tolerant CORDIC Processor for Space Applications

Wang, Sicong; Wen, Zhenchao; Yu, Lei

doi:10.1109/isscaa.2006.1627644

Cited by 5 publications

(2 citation statements)

References 10 publications

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“…However, FPGA-based CORDIC processors are susceptible to various factors such as aging, environmental conditions, and manufacturing defects, leading to the occurrence of faults [5]. Especially as the features shrink in size, the microelectronic devices and circuits become more sensitive to space radiation [6]. Faults can result in performance degradation, computational errors, and system failures [7][8][9].…”

Section: Introductionmentioning

confidence: 99%

Fault Classification and Diagnosis Approach Using FFT-CNN for FPGA-Based CORDIC Processor

Xie,

Chen,

Zhuang

et al. 2023

Electronics

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Within the realm of digital signal processing and communication systems, FPGA-based CORDIC (Coordinate Rotation Digital Computer) processors play pivotal roles, applied in trigonometric calculations and vector operations. However, soft errors have become one of the major threats in high-reliability FPGA-based applications, potentially degrading performance and causing system failures. This paper proposes a fault classification and diagnosis method for FPGA-based CORDIC processors, leveraging Fast Fourier Transform (FFT) and Convolutional Neural Networks (CNNs). The approach involves constructing fault classification datasets, optimizing features extraction through FFT to shorten the time of diagnosis and improve the diagnostic accuracy, and employing CNNs for training and testing of faults diagnosis. Different CNN architectures are tested to explore and construct the optimal fault classifier. Experimental results encompassing simulation and implementation demonstrate the improved accuracy and efficiency in fault classification and diagnosis. The proposed method provides fault prediction with an accuracy of more than 98.6% and holds the potential to enhance the reliability and performance of FPGA-based CORDIC circuit systems, surpassing traditional fault diagnosis methods such as Sum of Square (SoS).

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Section: Introductionmentioning

confidence: 99%

Fault Classification and Diagnosis Approach Using FFT-CNN for FPGA-Based CORDIC Processor

Xie,

Chen,

Zhuang

et al. 2023

Electronics

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“…For example, the avionics on-board aerospace craft or satellites often suffer a very harsh radiation environment, where the energetic particles such as protons and ions can cause them invalid. Especially as the features shrink in size, the microelectronic devices and circuits become more sensitive to space radiation [34]. The ionizing radiation origins may send charged particles through transistor junction regions, which will cause changes in sensitive areas such as the memory or logic region of devices [35,36].…”

Section: Introductionmentioning

confidence: 99%

Advancements in Spaceborne Synthetic Aperture Radar Imaging with System-on-Chip Architecture and System Fault-Tolerant Technology

Xie,

et al. 2023

Remote Sensing

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With the continuous development of satellite payload and system-on-chip (SoC) technology, spaceborne real-time synthetic aperture radar (SAR) imaging systems play a crucial role in various defense and civilian domains, including Earth remote sensing, military reconnaissance, disaster mitigation, and resource exploration. However, designing high-performance and high-reliability SAR imaging systems that operate in harsh environmental conditions while adhering to strict size, weight, and power consumption constraints remains a significant challenge. In this paper, we introduce a spaceborne SAR imaging chip based on a SoC architecture with system fault-tolerant technology. The fault-tolerant SAR SoC architecture has a CPU, interface subsystem, memory subsystem, data transit subsystem, and data processing subsystem. The data processing subsystem, which includes fast Fourier transform (FFT) modules, coordinated rotation digital computer (CORDIC) modules (for phase factor calculation), and complex multiplication modules, is the most critical component and can achieve various modes of SAR imaging. Through analyzing the computational requirements of various modes of SAR, we found that FFT accounted for over 50% of the total computational workload in SAR imaging processing, while the CORDIC modules for phase factor generation accounted for around 30%. Therefore, ensuring the fault tolerance of these two modules is crucial. To address this issue, we propose a word-length optimization redundancy (WLOR) method to make the fixed-point pipelined FFT processors in FFT modules fault tolerant. Additionally, we propose a fault-tolerant pipeline CORDIC architecture utilizing error correction code (ECC) and sum of squares (SOS) check. For other parts of the SoC architecture, we propose a generic partial triple modular redundancy (TMR) hardening method based on the HITS algorithm to improve fault tolerance. Finally, we developed a fully automated FPGA-based fault injection platform to test the design’s effectiveness by injecting errors at arbitrary locations. The simulation results demonstrate that the proposed methods significantly improved the chip’s fault tolerance, making the SAR imaging chip safer and more reliable. We also implemented a prototype measurement system with a chip-included board and demonstrated the proposed design’s performance on the Chinese Gaofen-3 strip-map continuous imaging system. The chip requires 9.2 s, 50.6 s, and 7.4 s for a strip-map with 16,384 × 16,384 granularity, multi-channel strip-map with 65,536 × 8192 granularity, and multi-channel scan mode with 32,768 × 4096 granularity, respectively, and the system hardware consumes 6.9 W of power to process the SAR raw data.

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A Comparative Analysis on Coordinate Rotation Digital Computer (CORDIC) Algorithm and Its use on Computer Vision Technology

Sharma

Rathore

Khan³

2020

2020 First International Conference on Power, Control and Computing Technologies (ICPC2T)

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High-Performance Fault-Tolerant CORDIC Processor for Space Applications

Cited by 5 publications

References 10 publications

Fault Classification and Diagnosis Approach Using FFT-CNN for FPGA-Based CORDIC Processor

Fault Classification and Diagnosis Approach Using FFT-CNN for FPGA-Based CORDIC Processor

Advancements in Spaceborne Synthetic Aperture Radar Imaging with System-on-Chip Architecture and System Fault-Tolerant Technology

A Comparative Analysis on Coordinate Rotation Digital Computer (CORDIC) Algorithm and Its use on Computer Vision Technology

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