A CMOS Distributed Amplifier With Distributed Active Input Balun Using GBW and Linearity Enhancing Techniques

Jahanian, A.; Heydari, Payam

doi:10.1109/tmtt.2012.2184134

Cited by 50 publications

(15 citation statements)

References 28 publications

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“…In order to improve the gain of the DA, multi-stage amplifiers are adopted as the gain stage [27], [36]- [39]. Bandwidth enhancement techniques [40], [41] can be employed to avoid bandwidth limitation by inter-stage parasitic capacitances.…”

Section: A Da Using Improved Gain Stagesmentioning

confidence: 99%

The (R)evolution of Distributed Amplifiers: From Vacuum Tubes to Modern CMOS and GaN ICs

2018

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I. INTRODUCTION B ROADBAND amplification of signals is desirable in many applications such as high-speed data communications, high-resolution imaging systems, optoelectronics and instrumentation systems. Wide bandwidth is one of the prominent factors to be considered in designing such a system since it determines ability of the system for transferring highdata-rate information, transmitting/receiving short pulses, or processing wideband signals. Designing broadband amplifiers has always been challenging. The ever-increasing demand for higher data-rates and low energy consumption in next generation communication systems further complicates the design of broadband amplifiers. Distributed amplifiers (DA), also known as travelling-wave amplifiers (TWA), are one of the most popular broadband amplifier architectures. The DA architecture was originally patented by Percival in 1936 [1] and later elaborated by Ginzton in 1948 [2]. The early DAs were implemented using vacuum tube technology. One of the first vacuum tube DAs fabricated in 1950 is shown in Fig. 1. The amplifier included three type 807 tubes and 482-Ω plate and grid lines. The amplifier achieved a gain of 11 dB, bandwidth of 100 Hz to 300 MHz, and a typical output power of 15 W [3]. The first Monolithic Microwave Integrated Circuit (MMIC) DA was demonstrated by Ayasli in 1982 [4] using a Gallium Arsenide (GaAs) MESFET technology. The amplifier, shown in Fig. 2, included four transistors with 1-µm gate length and 50-Ω input and output lines. It achieved 9-dB gain and 1-13 GHz bandwidth. GaAs remained the main technology for design of DAs until the inception of the first Indium Phosphide (InP) DA in 1990 [5] with an impressive bandwidth of 5-100 GHz. GaAs and InP semiconductor technologies have been predominantly employed in implementation of DAs. These technologies provide superior performance resulting from their high electron mobility, high saturated electron velocity, high breakdown voltage, and high-resistivity substrate. The later contributes to availability of low-loss integrated passive elements. The market demands for low cost, small size, and low power consumption of electronic systems has motivated researchers to develop techniques to implement distributed amplifiers using mainstream CMOS technologies. The first integrated CMOS DA was presented by Kleveland in 1999 [6]. Recently,

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Section: A Da Using Improved Gain Stagesmentioning

confidence: 99%

The (R)evolution of Distributed Amplifiers: From Vacuum Tubes to Modern CMOS and GaN ICs

2018

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“…As the signal swing increases, the nonlinearity of active devices has to be considered, which limits the linear output power of the DPA. According to the principle of the LS MGTR, the transfer function of drain current i D with respect to gate voltage v G can be expressed as (3), where the integral part is employed to take into account the higher order terms:

i_{d} (v_{g}) = i_{normald 1} + i_{normald 2} + i_{normald 3}

where i d1 , i d2 , and i d3 denote the variations of drain current i D related to the first order, the second order, and the higher orders of the gate voltage variation v g , respectively, which can be expressed as following:

\begin{matrix} i_{normald 1} = G_{normalm 1} v_{g} � i_{normald 2} = \frac{1}{2} G_{normalm 2} v_{g}^{2} \\ i_{normald 3} = \frac{1}{12} \int_{0}^{v_{normalg}} {(v_{g} - x)}^{2} G_{m 3} false(x + V_{normalG} false) d x \end{matrix}

where G m1 , G m2 , and G m3 are used to differentiate with the small‐signal polynomial coefficients. For the transistor with the gate width of 60 μm, the simulated i d3 with respect to the perturbations of gate voltage v G at different V G bias voltages is given in Figure A based on the BSIM3v3 nonlinear MOSFET model.…”

Section: Circuit Designmentioning

confidence: 99%

A 2–22 GHz CMOS wideband distributed power amplifier

Zhang

2017

Micro & Optical Tech Letters

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This article presents a novel wideband distributed power amplifier (DPA) implemented in a 0.18 μm CMOS technology. The DPA consists of a preamplifier and a medium‐power power amplifier (PA), and both of them are respectively composed of two distributed amplifiers (DAs), which have separate input artificial transmission lines (ATLs) but with their output ATLs shared to achieve wide frequency band. In the medium‐power PA, the large‐signal multigated transistor technology is applied to further improve the linear output power. Measurement results show that the DPA achieves 10.2 dB average associated gain from 2.5 to 22 GHz. The output power at 1‐dB output compression point (OP1dB) is more than 8 dBm over the frequency of 2–22 GHz, and the peak OP1dB is 12.6 dBm with the power‐added efficiency of 7.2% at 6 GHz.

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“…In 2012, Jahanian and Heydari [18] presented a CMOS DA with distributed active input balun that achieves a GBW product of 818 GHz, while improving linearity. Each cell within the DA employs dual-output two-stage topology that improves gain and linearity without adversely affecting BW and power.…”

Section: In 2009 Moez and Elmasrymentioning

confidence: 99%

“…The concurrent tri-band PA design is based on the DA structure with capacitive coupling to enable large device size, while maintaining wide BW, gain cells with the enhanced-gain peaking inductor, and negative-resistance active notch filters for improved tri-band gain response. The concurrent tri-band PA exhibits measured small-signal gain around 15.4, 14.7 and 12.3 dB in the low band (10)(11)(12)(13)(14)(15)(16)(17)(18)(19), midband (23-29 GHz), and high band (33-40 GHz), respectively.…”

Section: In 2013 Kao Et Al [20]mentioning

confidence: 99%

Design and Performance Investigation of a New Distributed Amplifier Architecture for 40 and 100 Gb/s Optical Receivers

Fyath

Al-Bayati

2015

IJCT

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The design of distributed amplifiers (DAs) is one of the challenging aspects in emerging ultra high bit rate optical communication systems. This is especially important when implementation in submicron silicon complementary metal oxide semiconductor (CMOS) process is considered. This work presents a novel design scheme for DAs suitable for frontend amplification in 40 and 100 Gb/s optical receivers. The goal is to achieve high flat gain and low noise figure (NF) over the ultra wideband operating bandwidth (BW). The design scheme combines shifted second tire (SST) matrix configuration with cascode amplification cell configuration and uses m-derived technique. Performance investigation of the proposed DA architecture is carried out and the results are compared with that of other DA architectures reported in the literature. The investigation covers the gain and NF spectra when the DAs are implemented in 180, 130, 90, 65 and 45 CMOS standards.The simulation results reveal that the proposed DA architecture offers the highest gain with highest degree of flatness and low NF when compared with other DA configurations. Gain-BW products of 42772 and 21137 GHz are achieved when the amplifier is designed for 40 and 100 Gb/s operation, respectively, using 45 nm CMOS standard. Thesimulation is performed using AWR Microwave Office (version 10).

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A CMOS Distributed Amplifier With Distributed Active Input Balun Using GBW and Linearity Enhancing Techniques

Cited by 50 publications

References 28 publications

The (R)evolution of Distributed Amplifiers: From Vacuum Tubes to Modern CMOS and GaN ICs

The (R)evolution of Distributed Amplifiers: From Vacuum Tubes to Modern CMOS and GaN ICs

A 2–22 GHz CMOS wideband distributed power amplifier

Design and Performance Investigation of a New Distributed Amplifier Architecture for 40 and 100 Gb/s Optical Receivers

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