A class of stored-transfer representations for redundant number systems

J VLSI Sign Process Syst Sign Image Video Technol

Ghodsi

2006

Redundant and hybrid-redundant number representations are used extensively to speed up arithmetic operations within general-purpose and special-purpose digital systems, with the latter (containing both redundant and nonredundant digits) offering cost advantages over fully redundant systems. We use weighted bit-set (WBS) encoding as a paradigm for uniform treatment of five previously studied variants of hybrid-redundant systems. We then extend the class of hybrid redundant numbers to coincide with the entire set of canonical WBS numbers by allowing an arbitrary nonredundant position, heretofore restricted to ordinary bits (posibits), to hold a negatively weighted bit (negabit). This flexibility leads to interesting and useful symmetric variants of hybrid-redundant representations. We provide a high-level circuit design, based solely on binary full-adders, for a constant-time universal hybrid-redundant adder capable of producing a canonical WBS-encoded sum of two canonical WBS (or extended hybrid) numbers. This is made possible by the use of conventional binary full-adders for reducing any collection of three posibits and negabits, where negabits use an inverted encoding. We compare our adder to previous designs, showing advantages in speed, cost, and regularity. Furthermore we explore representationally closed addition schemes, holding the benefit of greater regularity and reusability, and provide high-level representationally closed designs for all the previously studied variants of hybrid redundancy and for the new symmetric variants introduced here. Finally, we present a new functionality for a conventional (4; 2) compressor in combining any collection of five equally weighted negabits and posibits, and show its utility in the design of multipliers for extended hybridredundant numbers.

Section: Introductionmentioning

confidence: 85%

An Efficient Universal Addition Scheme for All Hybrid-Redundant Representations with Weighted Bit-Set Encoding

J VLSI Sign Process Syst Sign Image Video Technol

Ghodsi

2006

“…Besides negabits and posibits used in the WBS definition [6], other twits, such as transfer digits in , have been found useful in practice [5]. Also, one could think of an SDC, or stored-double-carry [18], digit in [0, 3] as being represented, with improved encoding efficiency, by a pair of equally weighted twits in and , respectively, instead of by three equally weighted posibits.…”

Section: Two-valued Digitsmentioning

confidence: 98%

“…Given that two-valued digit (twit) sets other than and have found applications in practice (e.g., in representing stored-transfer numbers [5]), we are motivated to generalize binary digits to twits and to extend WBS encoding to allow twits in any position. This is taken up in Sections II and III, where we define twits and weighted twit-set (WTS) encodings and examine their properties.…”

mentioning

confidence: 99%

“…In WBS-like encodings, each binary position, possibly including noncontiguous twits, represents a contiguous digit set with 0 as a member. WTS interpretation of previously studied redundant number systems (such as generalized signeddigit [18], hybrid-redundant [20], [21], and stored-transfer [5] representations) is taken up in Section 5, where we also provide a general arithmetic framework for WBS-like encoded numbers, based primarily on the notion of digit-set conversion [11], [12], and offer a representationally closed addition/subtraction high level design, for a subclass of WTS encodings. Section VI concludes the paper and offers a comprehensive hierarchical classification of all redundant number representations that the authors have encountered in the literature as instances of WTS encodings.…”

mentioning

confidence: 99%

“…Similarly, binary signed-digit (BSD) numbers [1] are commonly represented by using two bits weighted and for the position-digit, leading to the encoding [18]. Also in carry-save [15] and stored-transfer [5] redundant representations, the stored carry or transfer digit is composed of bits with the same weights as those of the main digit. Finally, a hybrid-redundant representation [21] may have redundant positions with stored-double-borrow (SDB) digits in , each of which is encoded using two bits of weight and one bit of weight or with a pair of bits of weights and .…”

mentioning

confidence: 99%

See 2 more Smart Citations

Weighted two-valued digit-set encodings: unifying efficient hardware representation schemes for redundant number systems

IEEE Trans. Circuits Syst. I

Ghodsi

2005

Self Cite

We introduce the notion of two-valued digit (twit) as a binary variable that can assume one of two different integer values. Posibits, or simply bits, in 0 1 and negabits in 1 0 , commonly used in two's-complement representations and ( ) encoding of binary signed digits, are special cases of twits. A weighted bit-set (WBS) encoding, which generalizes the two's-complement encoding by allowing one or more posibits and/or negabits in each radix-2 position, has been shown to unify many efficient implementations of redundant number systems. A collection of equally weighted twits, including ones with noncontiguous values (e.g., 1 1 or 0 2 ), can lead to wider representation range without the added storage and interconnection costs associated with multivalued digit sets. We present weighted twit-set (WTS) encodings as a generalization of WBS encodings, examine key properties of this new class of encodings, and show that any redundant number system (e.g., generalized signed-digit and hybrid-redundant systems), including those that are based on noncontiguous and/or zero-excluded digit sets, is faithfully representable by WTS encoding. We highlight this broad coverage by a tree chart having WTS representations at its root and various useful redundant representations at its many internal nodes and leaves. We further examine how highly optimized conventional components such as standard full/half-adders and compressors may be used for arithmetic on WTS-encoded operands, thus allowing highly efficient and VLSI-friendly circuit implementations. For example, focusing on the WBS-like subclass of WTS encodings, we describe a twit-based implementation of a particular stored-transfer representation which offers area and speed advantages over other similar designs based on WBS and hybrid-redundant representations.

Constant-time addition with hybrid-redundant numbers: Theory and implementations

2008

Integration

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