A Charge-Based Capacitance Model for Double-Gate Tunnel FETs With Closed-Form Solution

Lu, Bin; Lu, Hongliang; Zhang, Yuming; Zhang, Yimen; Cui, Xiaoran; Lv, Zhijun; Yang, Shizheng; Liu, Chen

doi:10.1109/ted.2017.2775341

Cited by 28 publications

(7 citation statements)

References 26 publications

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“…Alternatively, considering that inversion charge is injected from drain in TFET, as suggested in Ref. [12], the carrier density in the channel can be described as…”

Section: B Analytical Model Based On Timmentioning

confidence: 99%

An Accurate Analytical Model for Tunnel FET Output Characteristics

Guan

Carrillo-Nuñez

et al. 2019

IEEE Electron Device Lett.

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The analytical models for the output characteristics of tunnel FETs (TFETs) based on Maxwell-Boltzmann (MB) statistics have some accuracy issues, especially in linear region of operation, when compared with more sophisticated numerical approaches. In this letter, by exploiting the thermal injection method (TIM), an accurate analytical model for the TFET potential profile is proposed. Although the approach is initially envisaged for heterojunction TFETs (H-TFETs), it could be straightforwardly adopted for homojunction TFETs. After an accurate description of the potential profile is obtained, the current is then computed by means of a Landauer-like expression. Comparison with numerical simulations at different bias conditions shows that the predicted output characteristics qualitatively improve, leading to a significant enhancement in accuracy at a much less computational cost.

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“…Alternatively, considering that inversion charge is injected from drain in TFET, as suggested in Ref. [12], the carrier density in the channel can be described as…”

Section: B Analytical Model Based On Timmentioning

confidence: 99%

An Accurate Analytical Model for Tunnel FET Output Characteristics

Guan

Carrillo-Nuñez

et al. 2019

IEEE Electron Device Lett.

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“…For instance, Yang et al in [36] have presented a compact model for TFET capacitances using BSIM3 equations [37]. Lu et al in [38] and Zhang et al in [39,40]…”

Section: List Of Symbolsmentioning

confidence: 99%

“…In Fig First, the compact model for an n-type Si DG TFET was derived. Similar to the other suggested capacitance models by Zhang et al in [39] and Lu et al in [38], in the preliminary assumptions it has been considered that the inversion channel charges are equally distributed.…”

Section: Sg Line Tunneling Tfet-based Circuitsmentioning

confidence: 99%

Compact modeling of intrinsic capacitances in Double-Gate Tunnel-FETs

Farokhnejad

Graef

Horst

et al. 2017

2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)

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ADVERTIMENT. L'accés als continguts d'aquesta tesi doctoral i la seva utilització ha de respectar els drets de la persona autora. Pot ser utilitzada per a consulta o estudi personal, així com en activitats o materials d'investigació i docència en els termes establerts a l'art. 32 del Text Refós de la Llei de Propietat Intel•lectual (RDL 1/1996). Per altres utilitzacions es requereix l'autorització prèvia i expressa de la persona autora. En qualsevol cas, en la utilització dels seus continguts caldrà indicar de forma clara el nom i cognoms de la persona autora i el títol de la tesi doctoral. No s'autoritza la seva reproducció o altres formes d'explotació efectuades amb finalitats de lucre ni la seva comunicació pública des d'un lloc aliè al servei TDX. Tampoc s'autoritza la presentació del seu contingut en una finestra o marc aliè a TDX (framing). Aquesta reserva de drets afecta tant als continguts de la tesi com als seus resums i índexs.

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“…The characteristic analysis and structure optimization of the gate dielectric material [13][14][15] and gate dielectrics with different dielectric constants have been performed [15][16][17][18][19][20]. In device physics, the analytical modeling of TFETs with the double-gate structure [21][22][23][24][25][26][27] and surrounding-gate structure [28][29][30][31][32][33] has also been extensively performed. One disadvantage of silicon-based TFETs compared to MOS-FETs is the smaller forward current, and the magnitude of the forward current is determined by the efficiency of the tunneling current generation.…”

Section: Introductionmentioning

confidence: 99%

A Study on the Effect of the Structural Parameters and Internal Mechanism of a Bilateral Gate-Controlled S/D Symmetric and Interchangeable Bidirectional Tunnel Field Effect Transistor

Jin

Wang

et al. 2021

Nanoscale Res Lett

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A bilateral gate-controlled S/D symmetric and interchangeable bidirectional tunnel field effect transistor (B-TFET) is proposed in this paper, which shows the advantage of bidirectional switching characteristics and compatibility with CMOS integrated circuits compared to the conventional asymmetrical TFET. The effects of the structural parameters, e.g., the doping concentrations of the N+ region and P+ region, length of the N+ region and length of the intrinsic region, on the device performances, e.g., the transfer characteristics, Ion–Ioff ratio and subthreshold swing, and the internal mechanism are discussed and explained in detail.

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A Charge-Based Capacitance Model for Double-Gate Tunnel FETs With Closed-Form Solution

Cited by 28 publications

References 26 publications

An Accurate Analytical Model for Tunnel FET Output Characteristics

An Accurate Analytical Model for Tunnel FET Output Characteristics

Compact modeling of intrinsic capacitances in Double-Gate Tunnel-FETs

A Study on the Effect of the Structural Parameters and Internal Mechanism of a Bilateral Gate-Controlled S/D Symmetric and Interchangeable Bidirectional Tunnel Field Effect Transistor

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