A Capacitorless LDO Regulator With Fast Feedback Technique and Low-Quiescent Current Error Amplifier

Kim, Young-il; Lee, Sangsun

doi:10.1109/tcsii.2013.2258250

Cited by 90 publications

(37 citation statements)

References 13 publications

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“…The transient response of LDO regulators is dominated by both the slew rate of the gate power transistor, SR G , and the loop gain bandwidth, BW L [9]. To achieve a high slew rate, a large current must be supplied to the gate of a PMOS.…”

Section: Proposed Design and Circuit Implementationmentioning

confidence: 99%

Design of low-power, fast-transient-response, capacitor-less low-dropout regulator for mobile applications

Moon

Hyun

Kim

2016

IEICE Electron. Express

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This paper presents a capacitor-less low-dropout (LDO) regulator for on-chip mobile applications. An additional push-pull current with a capacitive coupling circuit is proposed to significantly enhance the transient response of the LDO regulator. The proposed LDO regulator can deliver an output current of 100 mA with a minimum dropout voltage of 0.4 V. The circuit was modeled and implemented in a 0.35-µm CMOS process with a die area of 0.22 mm 2 . The experimental results show that the LDO regulator can be recovered within 0.5 µs at a voltage spike less than 90 mV.

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Section: Proposed Design and Circuit Implementationmentioning

confidence: 99%

Design of low-power, fast-transient-response, capacitor-less low-dropout regulator for mobile applications

Moon

Hyun

Kim

2016

IEICE Electron. Express

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“…In published literature, different regulator architectures, which have advantages in specific applications, have been proposed [2][3][4][5][6]. The adequacy of a regulator structure is determined by the requirements of the technical specifications for the power supply.…”

Section: Proposed Ldo Regulator Structure and Control Schemementioning

confidence: 99%

Design of Fast Transient Response, Low Dropout Regulator with Enhanced Steady State Characteristics on the Basis of PID Control

Mumuni¹,

Mumuni²

2016

IJCSITCE

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“…The compensation is realized by active feedback compensation (AFC) and adaptively-biased dampingfactor-control compensation (DFC), and the transient enhancer block is also embedded in the proposed LDR structure. [6], [13] which can provide static bias current that is dynamically-adjustable in response to load transient.…”

Section: Proposed Ldo Regulator Architecture and Transient Enhancmentioning

confidence: 99%

“…Recent researches have produced various output capacitorless LDR structures [6]- [9] that all require various polesplitting compensation methods for stability. Conventional passive Miller compensations have the disadvantage of reduced unity-gain-frequency (UGF); active feedback (AFC) and damping-factor-control (DFC) are among the most effective that overcome this side-effect, with extended UGF and reduced Q factor [7], [10]- [12].…”

Section: Introductionmentioning

confidence: 99%

Area-efficient capacitor-less LDR with enhanced transient response for SoC in 65-nm CMOS

Yang

Mok

2014

2014 IEEE International Symposium on Circuits and Systems (ISCAS)

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An output capacitor-less low-dropout regulator (LDR) with enhanced transient responses for system-on-a-chip (SoC) power management applications is presented in this paper. The boosted push-pull driving capability is realized by applying a transient-adaptively-biased folded-cascode error amplifier structure with a cross-coupled output stage that achieves higher dc gain and faster slew rate. The proposed LDR is compensated by combining active feedback (AFC) and adaptively-biased damping-factor-control (DFC) effectively. The idea of the LDR is implemented with a standard 65-nm CMOS process. The on-chip compensation capacitance is only 200fF. The output is 1.0V, which delivers a maximum current of 50mA at 200mV drop-out, and the output capacitor can be as large as 100pF. Extensive simulations verify that the proposed LDR can recover from 100ns-edged 10µA-50mA load transient and 1.2V-1.8V line transient in 200ns, with much reduced over-/under-shoot at the output.

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A Capacitorless LDO Regulator With Fast Feedback Technique and Low-Quiescent Current Error Amplifier

Cited by 90 publications

References 13 publications

Design of low-power, fast-transient-response, capacitor-less low-dropout regulator for mobile applications

Design of low-power, fast-transient-response, capacitor-less low-dropout regulator for mobile applications

Design of Fast Transient Response, Low Dropout Regulator with Enhanced Steady State Characteristics on the Basis of PID Control

Area-efficient capacitor-less LDR with enhanced transient response for SoC in 65-nm CMOS

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